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SI53价格
参考价格：￥27.1405
型号：SI53019-A01AGM 品牌：Silicon Labs 备注：这里有SI53多少钱，2025年最近7天走势，今日出价，今日竞价，SI53批发/采购报价，SI53行情走势销售排行榜，SI53报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ) Description The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL® circuitry to provide a low jitter clock at high frequencies. The Si530/531 is available with any-rate output frequency from 10 to 945 MHz and select frequencies to 1400 MHz. Unlike a traditional XO, where a different crys | SILABS 芯科科技 |   | ||
CRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ) Features Available with any-rate output frequencies from 10 MHz to 945 MHz and select frequencies to 1.4 GHz 3rd generation DSPLL® with superior jitter performance 3x better frequency stability than SAW-based oscillators Internal fixed crystal frequency ensures high reliability an | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V current-mode, HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBus addresses Fixed external feedback path 8 dedicated OE pin PLL or | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V current-mode, HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBus addresses Fixed external feedback path 8 dedicated OE pin PLL or | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V current-mode, HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBus addresses Fixed external feedback path 8 dedicated OE pin PLL or | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN3 AND QPI BUFFER Features Nineteen 0.7 V current-mode, HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses Fixed internal feedback path 8 dedicated OE pins PLL or | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN3 AND QPI BUFFER Features Nineteen 0.7 V current-mode, HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses Fixed internal feedback path 8 dedicated OE pins PLL or | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN3 AND QPI BUFFER Features Nineteen 0.7 V current-mode, HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses Fixed internal feedback path 8 dedicated OE pins PLL or | SKYWORKS 思佳讯 | | ||
CRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ) Description The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL® circuitry to provide a low jitter clock at high frequencies. The Si530/531 is available with any-rate output frequency from 10 to 945 MHz and select frequencies to 1400 MHz. Unlike a traditional XO, where a different crys | SILABS 芯科科技 | | ||
CRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ) Features Available with any-rate output frequencies from 10 MHz to 945 MHz and select frequencies to 1.4 GHz 3rd generation DSPLL® with superior jitter performance 3x better frequency stability than SAW-based oscillators Internal fixed crystal frequency ensures high reliability an | SKYWORKS 思佳讯 | | ||
PRECISION CLOCK MULTIPLIER/REGENERATOR IC Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th | SILABS 芯科科技 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock Buffer KEY FEATURES • PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant • Two low-power PCIe clock outputs • Supports Serial-ATA (SATA) at 100 MHz • No termination resistors required for differential clocks • 2.5 V or 3.3 V Power supply • Spread Spectrum Tolerant • Extended Tempe | SKYWORKS 思佳讯 | | ||
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features Six 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin SMBus address configurable to | SKYWORKS 思佳讯 | | ||
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features Six 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin SMBus address configurable to | SKYWORKS 思佳讯 | | ||
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features Six 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin SMBus address configurable to | SKYWORKS 思佳讯 | | ||
DB800ZL 8-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features Eight 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI SMBus address is 0xD8 PLL or bypass mode Spread spectrum tolerable 1.05 to 3.3 V power supply v | SKYWORKS 思佳讯 | | ||
DB800ZL 8-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features Eight 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI SMBus address is 0xD8 PLL or bypass mode Spread spectrum tolerable 1.05 to 3.3 V power supply v | SKYWORKS 思佳讯 | | ||
DB800ZL 8-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features Eight 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI SMBus address is 0xD8 PLL or bypass mode Spread spectrum tolerable 1.05 to 3.3 V power supply v | SKYWORKS 思佳讯 | | ||
PRECISION CLOCK MULTIPLIER/REGENERATOR IC Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th | SILABS 芯科科技 | | ||
PRECISION CLOCK MULTIPLIER/REGENERATOR IC Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th | SILABS 芯科科技 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers in | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers in | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers in | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
IRED Features •Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type •Low power consumption •High radiant intensity Applications •Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in | AUK | | ||
Colorless transparency lens type Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type • Low power consumption • High radiant intensity Applications • Light source for remote control devices (This device should be only used at non- repetitive pulse mode) | KODENSHI 可天士 | | ||
IRED Features •Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type •Low power consumption •High radiant intensity Applications •Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in | AUK | | ||
IRED Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type • Low power consumption Applications • Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in combination with PIN photodiodes or photot | AUK | | ||
IRED Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type • Low power consumption Applications • Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in combination with PIN photodiodes or photot | AUK | | ||
Colorless transparency lens type Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type • Low power consumption • High radiant intensity Applications • Light source for remote control devices (This device should be only used at non- repetitive pulse mode) | KODENSHI 可天士 | | ||
IRED Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type •Low power consumption • High radiant intensity Applications •Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in com | AUK | | ||
Colorless transparency lens type Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type • Low power consumption • High radiant intensity Applications •Light source for remote control devices (This device should be only usedat non- repetitive pulse mode) | KODENSHI 可天士 | | ||
IRED Features • Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type •Low power consumption • High radiant intensity Applications •Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in com | AUK | | ||
Pin-Controlled 1_710 MHz Jitter Cleaning Clock Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl | SILABS 芯科科技 | | ||
Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu | SILABS 芯科科技 | | ||
ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR Features Generates any frequency from 2 kHz to 945 MHz and select frequencies to 1.4 GHz from an input frequency of 2 kHz to 710 MHz Ultra-low jitter clock outputs as low as 290 fs rms (12 kHz–20 MHz), 320 fs rms (50 kHz–80 MHz) Integrated loop filter with selectable loop bandwidth | SKYWORKS 思佳讯 | | ||
SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER Features Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source Two clock inputs/two clock outp | SKYWORKS 思佳讯 | | ||
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER Features PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant Supports Serial ATA (SATA) at 100 MHz 100–210 MHz operation Low power, push pull, differential output buffers Internal termination for maximum integration Dedicated output enable pin for each clock | SKYWORKS 思佳讯 | | ||
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER Features PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant Supports Serial ATA (SATA) at 100 MHz 100–210 MHz operation Low power, push pull, differential output buffers Internal termination for maximum integration Dedicated output enable pin for each clock | SKYWORKS 思佳讯 | | ||
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER Features PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant Supports Serial ATA (SATA) at 100 MHz 100–210 MHz operation Low power, push pull, differential output buffers Internal termination for maximum integration Dedicated output enable pin for each clock | SKYWORKS 思佳讯 | | ||
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER Features PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant Supports Serial ATA (SATA) at 100 MHz 100–210 MHz operation Low power, push pull, differential output buffers Internal termination for maximum integration Dedicated output enable pin for each output | SKYWORKS 思佳讯 | |
SI53产品属性
- 类型
描述
- 型号
SI53
- 制造商
SILABS
- 制造商全称
SILABS
- 功能描述
CRYSTAL OSCILLATOR(XO)(10 MHZ TO 1.4 GHZ)
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
SILON |
24+ |
NA/ |
3942 |
原厂直销,现货供应,账期支持! |
|||
SILICON |
25+ |
QFN |
15620 |
SILICON全新特价SI53019-A01AGMR即刻询购立享优惠#长期有货 |
|||
SILICON |
1716+ |
QFN72 |
103 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
SILICON |
24+ |
QFN |
7850 |
只做原装正品现货或订货假一赔十! |
|||
Silicon Labs |
22+ |
72QFN |
9000 |
原厂渠道,现货配单 |
|||
SILICON LABS(芯科) |
2021+ |
QFN-72(10x10) |
499 |
||||
SILICON LABS/芯科 |
21+ |
QFN |
1062 |
只做原装正品,不止网上数量,欢迎电话微信查询! |
|||
SILICON LABS(芯科) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
|||
SILICON LABS(芯科) |
23+ |
N/A |
20000 |
||||
SILICON LABS(芯科) |
24+ |
QFN72EP(10x10) |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
SI53规格书下载地址
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- SI516
- SI515
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- Si51214
- Si51211
- SI51210
- SI512
- Si5110
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2020-3-3
DdatasheetPDF页码索引
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