Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Features  Generates any frequency from 2 kHz to 945 MHz and select frequencies to 1.4 GHz from an input frequency of 2 kHz to 710 MHz  Ultra-low jitter clock outputs as low as 290 fs rms (12 kHz–20 MHz), 320 fs rms (50 kHz–80 MHz)  Integrated loop filter with selectable loop bandwidth

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Features  Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet  Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source  Two clock inputs/two clock outp

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each clock

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each clock

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each clock

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial ATA (SATA) at 100 MHz  100–210 MHz operation  Low power, push pull, differential output buffers  Internal termination for maximum integration  Dedicated output enable pin for each output

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 NINE-OUTPUT FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial-ATA (SATA) at 100 MHz  Low power push-pull differential output buffers  No termination resistors required  Output enable pins for all buffered clocks  Up to nine buffered clocks  100 to

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 NINE-OUTPUT FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial-ATA (SATA) at 100 MHz  Low power push-pull differential output buffers  No termination resistors required  Output enable pins for all buffered clocks  Up to nine buffered clocks  100 to

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 NINE-OUTPUT FANOUT BUFFER

Features  PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant  Supports Serial-ATA (SATA) at 100 MHz  Low power push-pull differential output buffers  No termination resistors required  Output enable pins for all buffered clocks  Up to nine buffered clocks  100 to

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Features  Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet  Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source  Two clock inputs/two clock outp

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Features  Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet  Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source  Two clock inputs/two clock outp

IRED

Features •Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type •Low power consumption Applications •Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in combination with PIN photodiodes

IRED

Features •Colorless transparency lens type • φ5mm(T-13/4) all plastic mold type •Low power consumption Applications •Infrared remote control and free air transmission systems with low forward voltage and comfortable radiation angle requirements in combination with PIN photodiodes

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Features  Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet  Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source  Two clock inputs/two clock outp

Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

文件：1.18888 Mbytes Page：22 Pages

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

封装/外壳：24-WFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PCIE BUFFER 100MHZ 24QFN 集成电路（IC） 应用特定时钟/定时

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER

文件：1.1928 Mbytes Page：22 Pages

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

封装/外壳：24-WFQFN 裸露焊盘 包装：管件 描述：IC PCIE BUFFER 100MHZ 1IN 4OUT 集成电路（IC） 应用特定时钟/定时

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

Power consumption test

文件：1.14652 Mbytes Page：6 Pages

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

文件：1.3889 Mbytes Page：22 Pages

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 NINE OUTPUT FANOUT BUFFER

文件：1.43415 Mbytes Page：23 Pages

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT FANOUT BUFFER

文件：147.16 Kbytes Page：22 Pages

This change is considered a minor change which does not affect form, fit, function, quality, or reliability.

文件：93.99 Kbytes Page：2 Pages

Power consumption test

文件：1.1577 Mbytes Page：6 Pages

IRED

文件：183.09 Kbytes Page：4 Pages

IRED

文件：183.09 Kbytes Page：4 Pages

IRED

文件：183.09 Kbytes Page：4 Pages

High Speed IRED

文件：181.75 Kbytes Page：4 Pages

High Speed IRED

文件：180.34 Kbytes Page：3 Pages

High Speed IRED

文件：181.75 Kbytes Page：4 Pages

High Speed IRED

文件：180.34 Kbytes Page：3 Pages

High Speed IRED

文件：181.75 Kbytes Page：4 Pages

Colorless transparency lens type

文件：198.44 Kbytes Page：4 Pages

IRED

文件：73.11 Kbytes Page：3 Pages

IRED

文件：180.8 Kbytes Page：4 Pages

IRED

文件：73.11 Kbytes Page：3 Pages

2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 µA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive