SNJ54BCT价格

参考价格:¥188.4263

型号:SNJ54BCT2244J 品牌:TEXAS INSTRUMENTS 备注:这里有SNJ54BCT多少钱,2025年最近7天走势,今日出价,今日竞价,SNJ54BCT批发/采购报价,SNJ54BCT行情走势销售排行榜,SNJ54BCT报价。
型号 功能描述 生产厂家 企业 LOGO 操作

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W),

TI

德州仪器

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W),

TI

德州仪器

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W),

TI

德州仪器

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W),

TI

德州仪器

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W),

TI

德州仪器

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W),

TI

德州仪器

OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Output Ports Have Equivalent 33-Ω Series Resistors, So No External Resistors Are Required 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering informatio

TI

德州仪器

OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Output Ports Have Equivalent 33-Ω Series Resistors, So No External Resistors Are Required 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering informatio

TI

德州仪器

OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Output Ports Have Equivalent 33-Ω Series Resistors, So No External Resistors Are Required 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering informatio

TI

德州仪器

OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Output Ports Have Equivalent 33-Ω Series Resistors, So No External Resistors Are Required 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering informatio

TI

德州仪器

OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Output Ports Have Equivalent 33-Ω Series Resistors, So No External Resistors Are Required 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering informatio

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) description/ordering i

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) description/ordering i

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) description/ordering i

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) description/ordering i

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) description/ordering i

TI

德州仪器

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

TI

德州仪器

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

TI

德州仪器

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

TI

德州仪器

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

TI

德州仪器

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

TI

德州仪器

OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State True Outputs Back-to-Back Registers for Storage ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plas

TI

德州仪器

OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State True Outputs Back-to-Back Registers for Storage ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plas

TI

德州仪器

OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State True Outputs Back-to-Back Registers for Storage ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plas

TI

德州仪器

OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State True Outputs Back-to-Back Registers for Storage ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plas

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL TRANSPARENT D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL TRANSPARENT D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL TRANSPARENT D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL TRANSPARENT D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering

TI

德州仪器

OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (J, N) description The ′B

TI

德州仪器

OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (J, N) description The ′B

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ord

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ord

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ord

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ord

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ord

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL INVERTING BUFFERS

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F240 and ’BCT240 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL INVERTING BUFFERS

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F240 and ’BCT240 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL INVERTING BUFFERS

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F240 and ’BCT240 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL INVERTING BUFFERS

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F240 and ’BCT240 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUFFERS

Members of the Texas Instruments SCOPE™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F244 and ’BCT244 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUFFERS

Members of the Texas Instruments SCOPE™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F244 and ’BCT244 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUFFERS

Members of the Texas Instruments SCOPE™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F244 and ’BCT244 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUFFERS

Members of the Texas Instruments SCOPE™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F244 and ’BCT244 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE ™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F245 and BCT245 in the Normal- Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE ™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F245 and BCT245 in the Normal- Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE ™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F245 and BCT245 in the Normal- Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE ™ Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F245 and BCT245 in the Normal- Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F373 and BCT373 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F373 and BCT373 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F373 and BCT373 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES

Members of the Texas Instruments SCOPE E Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F373 and BCT373 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operation

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

Members of the Texas Instruments SCOPE  Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F374 and ’BCT374 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

Members of the Texas Instruments SCOPE  Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F374 and ’BCT374 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

Members of the Texas Instruments SCOPE  Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F374 and ’BCT374 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

Members of the Texas Instruments SCOPE  Family of Testability Products Octal Test-Integrated Circuits Functionally Equivalent to ’F374 and ’BCT374 in the Normal-Function Mode Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Test Operatio

TI

德州仪器

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

文件:491.65 Kbytes Page:14 Pages

TI

德州仪器

SNJ54BCT产品属性

  • 类型

    描述

  • 型号

    SNJ54BCT

  • 制造商

    Texas Instruments

  • 功能描述

    Buffer/Line Driver 4-CH Non-Inverting 3-ST BiCMOS 14-Pin CDIP Tube

更新时间:2025-11-4 11:01:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
18+
N/A
6000
主营军工偏门料,国内外都有渠道
TI/德州仪器
QQ咨询
CFP14
824
全新原装 研究所指定供货商
TI(德州仪器)
24+
CDIP20
1476
原装现货,免费供样,技术支持,原厂对接
TI/德州仪器
23+
CDIP14
5000
TI原厂原装全系列订货假一赔十
TI
16+
LCCC
10000
原装正品
TI/德州仪器
24+
LCC
1122
全部原装现货优势产品
TI/德州仪器
25+
CDIP-14
9980
只做原装 支持实单
TI/德州仪器
25+
CDIP14
8880
原装认准芯泽盛世!
TI
20+
N/A
3600
专业配单,原装正品假一罚十,代理渠道价格优
TI/德州仪器
23+
CFP14
11200
原厂授权一级代理、全球订货优势渠道、可提供一站式BO

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