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NTE74LS112A价格
参考价格：￥5.7345
型号：NTE74LS112A 品牌：NTE 备注：这里有NTE74LS112A多少钱，2026年最近7天走势，今日出价，今日竞价，NTE74LS112A批发/采购报价，NTE74LS112A行情走势销售排行榜，NTE74LS112A报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the | Motorola 摩托罗拉 |   | ||
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra | Fairchild 仙童半导体 | | ||
Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear) ● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....) | HitachiHitachi Semiconductor 日立日立公司 | | ||
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra | Fairchild 仙童半导体 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP | Motorola 摩托罗拉 | Motorola | | |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs | Fairchild 仙童半导体 | Fairchild | | |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs | Fairchild 仙童半导体 | Fairchild | | |
DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS | NSC 国半 | NSC | | |
Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Ouadruple 2-input Positive NAND Gates | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | TI 德州仪器 | TI | |
NTE74LS112A产品属性
- 类型
描述
- 型号
NTE74LS112A
- 制造商
NTE Electronics
- 功能描述
IC-TTL QUAD NAND GATE
- 制造商
NTE Electronics
- 功能描述
DUAL J-K F/F DIP-16
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
HIT |
24+ |
SMD |
20000 |
一级代理原装现货假一罚十 |
|||
MXIC |
23+24 |
TSOP |
27960 |
原装现货.优势热卖.终端BOM表可配单 |
|||
SIG |
24+/25+ |
200 |
原装正品现货库存价优 |
||||
TI |
25+ |
3.9mm |
123 |
全新现货 |
|||
HIT |
25+ |
DIP |
4500 |
全新原装、诚信经营、公司现货销售 |
|||
24+ |
N/A |
57000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
HD |
2023+ |
SOP |
58000 |
进口原装,现货热卖 |
|||
FSA |
05+ |
100 |
原装正品 |
||||
TI/REN |
24+ |
DIP |
36500 |
原装现货/放心购买 |
|||
FSC |
23+ |
DIP |
3600 |
原装正品假一罚百!可开增票! |
NTE74LS112A规格书下载地址
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DdatasheetPDF页码索引
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