SN74LS112A价格

参考价格:¥1.9428

型号:SN74LS112AD 品牌:TI 备注:这里有SN74LS112A多少钱,2025年最近7天走势,今日出价,今日竞价,SN74LS112A批发/采购报价,SN74LS112A行情走势销售排行榜,SN74LS112A报价。
型号 功能描述 生产厂家&企业 LOGO 操作
SN74LS112A

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

SN74LS112A

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

SN74LS112A

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR) 描述:IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路(IC) 触发器

TI2

德州仪器

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR) 描述:IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路(IC) 触发器

TI2

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI1

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the

Motorola

摩托罗拉

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

HitachiHitachi Semiconductor

日立日立公司

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

替换型号 功能描述 生产厂家&企业 LOGO 操作

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

Motorola

摩托罗拉

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

TI

德州仪器

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)

HitachiHitachi Semiconductor

日立日立公司

DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)

HitachiHitachi Semiconductor

日立日立公司

Ouadruple 2-input Positive NAND Gates

HitachiHitachi Semiconductor

日立日立公司

SN74LS112A产品属性

  • 类型

    描述

  • 型号

    SN74LS112A

  • 功能描述

    触发器 Dual Neg-Edge-Trig J-K Flip-Flop

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2025-8-16 23:01:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
SOP16
2669
只做原装,提供一站式配单服务,代工代料。BOM配单
TI/德州仪器
24+
NA/
4225
原厂直销,现货供应,账期支持!
MOT
23+
NA
20000
全新原装假一赔十
TI(德州仪器)
2024+
DIP-16
500000
诚信服务,绝对原装原盘
TI/德州仪器
1948+
DIP16
6852
只做原装正品现货!或订货假一赔十!
TI/德州仪器
22+
DIP-16
500000
原装现货支持实单价优/含税
TI
23+
SOP5.2
12800
公司只有原装 欢迎来电咨询。
TI
24+
PDIP|16
798400
免费送样原盒原包现货一手渠道联系
FSC
25+23+
SOP16
54389
绝对原装正品现货,全新深圳原装进口现货
TI
25+
SOP
4500
全新原装、诚信经营、公司现货销售!

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