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MK2049价格

参考价格：￥85.5047

型号：MK2049-34SAILF 品牌：Integrated Device Techno 备注：这里有MK2049多少钱，2025年最近7天走势，今日出价，今日竞价，MK2049批发/采购报价，MK2049行情走势销售排行榜，MK2049报价。

型号	功能描述	生产厂家企业	LOGO
MK2049-01	Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are	ICST	ICST
MK2049-01S	Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are	ICST	ICST
MK2049-01SI	Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are	ICST	ICST
MK2049-01SITR	Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are	ICST	ICST
MK2049-01STR	Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are	ICST	ICST
MK2049-02	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-02S	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-02SI	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-02SITR	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-02STR	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-03S	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-03SI	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-03SITR	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-03STR	Communications Clock PLLs Description The MK2049-02 and MK2049-03 are Phase-Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation	ICST	ICST
MK2049-34	3.3 V Communications Clock PLL Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks freq	ICST	ICST
MK2049-34	3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Fixed I/O phase relationship on all selections • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8	RENESAS 瑞萨	RENESAS
MK2049-34A	3.3 Volt Communications Clock VCXO PLL Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34A generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clo	ICST	ICST
MK2049-34SAI	3.3 Volt Communications Clock VCXO PLL Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34A generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clo	ICST	ICST
MK2049-34SAITR	3.3 Volt Communications Clock VCXO PLL Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34A generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clo	ICST	ICST
MK2049-34SI	3.3 V Communications Clock PLL Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks freq	ICST	ICST
MK2049-34SI	3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Fixed I/O phase relationship on all selections • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8	RENESAS 瑞萨	RENESAS
MK2049-34SITR	3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Fixed I/O phase relationship on all selections • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8	RENESAS 瑞萨	RENESAS
MK2049-34SITR	3.3 V Communications Clock PLL Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks freq	ICST	ICST
MK2049-35	3.3 V Communications Clock PLL Description The MK2049-35 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-35 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies. This allows for the generation o	ICST	ICST
MK2049-35SI	3.3 V Communications Clock PLL Description The MK2049-35 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-35 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies. This allows for the generation o	ICST	ICST
MK2049-35SITR	3.3 V Communications Clock PLL Description The MK2049-35 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-35 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies. This allows for the generation o	ICST	ICST
MK2049-36	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • Pb (lead) free package • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock or	RENESAS 瑞萨	RENESAS
MK2049-36	3.3 V Communications Clock PLL Description The MK2049-36 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies. This allows for the generation o	ICST	ICST
MK2049-36SI	3.3 V Communications Clock PLL Description The MK2049-36 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies. This allows for the generation o	ICST	ICST
MK2049-36SILF	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • Pb (lead) free package • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock or	RENESAS 瑞萨	RENESAS
MK2049-36SILFTR	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • Pb (lead) free package • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock or	RENESAS 瑞萨	RENESAS
MK2049-36SITR	3.3 V Communications Clock PLL Description The MK2049-36 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies. This allows for the generation o	ICST	ICST
MK2049-45	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45	3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.	ICST	ICST
MK2049-45A	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45ASILF	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45ASILFTR	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45SI	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45SI	3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.	ICST	ICST
MK2049-45SILF	3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.	ICST	ICST
MK2049-45SILF	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45SILFTR	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-45SILFTR	3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.	ICST	ICST
MK2049-45SITR	3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.	ICST	ICST
MK2049-45SITR	3.3 VOLT COMMUNICATIONS CLOCK PLL Features • Packaged in 20 pin SOIC • 3.3 V + 5 operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to	RENESAS 瑞萨	RENESAS
MK2049-34SAI	3.3 Volt Communications Clock VCXO PLL	RENESAS 瑞萨	RENESAS
MK2049-34SAILF	封装/外壳：20-SOIC（0.295"，7.50mm 宽）包装：卷带（TR）描述：IC VCXO PLL CLK SYNTH 20-SOIC 集成电路（IC）时钟发生器，PLL，频率合成器	ETC 知名厂家	ETC
MK2049-34SAILFTR	封装/外壳：20-SOIC（0.295"，7.50mm 宽）包装：卷带（TR）描述：IC VCXO PLL CLK SYNTH 20-SOIC 集成电路（IC）时钟发生器，PLL，频率合成器	ETC 知名厂家	ETC
MK2049-34SI	3.3 V Communications Clock PLL	RENESAS 瑞萨	RENESAS
MK2049-45	3.3V Communications Clock PLL	RENESAS 瑞萨	RENESAS
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CX2049L	BROADBAND: RF & WIRELESS RF, HFC & CATV APPLICATIONS Pluse offers a comprehensive line of RF magnetic components for use in wireless and RF applications, including mobile communications, cable television, hybrid fiber/coax (HFC) equipment, cable modems, set-top boxes, and home networking. The components are al	pulse	pulse
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MK2049产品属性

类型
描述
型号
MK2049
制造商
ICS
制造商全称
ICS
功能描述
Communications Clock PLL

MK2049供应商更多...

更新时间：2025-12-25 23:01:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳市得捷芯城科技有限公司	MK2049-34SATLFTR	IDT	24+	NA/	776	优势代理渠道,原装正品,可全系列订货开增值税票	询价
上海意淼电子科技有限公司	MK2049-34SI	UCLOCK	23+	SOP20	20000	全新原装假一赔十	询价
深圳诚思涵科技有限公司	MK2049-34SATLFTR	IDT	24+	SOIC20	32350	深圳存库原装现货	询价
深圳市科芯源微电子有限公司	MK2049-34SI	MK	25+	SOP20	54658	百分百原装现货实单必成	询价
深圳市金芯世纪电子有限公司	MK2049-34SI	MK	22+	SOP20	100000	代理渠道/只做原装/可含税	询价
深圳市科达星科技有限公司	MK2049-34SATLFTR	IDT	24+	SOIC20	15300	公司常备大量原装现货,可开13%增票!	询价
深圳市创新迹电子有限公司	MK2049-34SATLFTR	IDT	22+	SOIC20	20000	公司只有原装品质保障	询价
深圳市赛美科科技有限公司	MK2049-34SI	MICROCHIP		SOP20	68500	一级代理原装正品假一罚十价格优势长期供货	询价
深圳市诺美思科技有限公司	MK2049-34SATLFTR	IDT		原厂封装	9800	原装进口公司现货假一赔百	询价
深圳市益百分电子有限公司	MK2049-34SI	UCLOCK	00+	SOP20	2255	全新原装进口自己库存优势	询价

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MK2049价格

MK2049产品属性

MK2049供应商更多...

MK2049芯片相关品牌

MK2049规格书下载地址

MK2049参数引脚图相关

MK2049数据表相关新闻

MK22FN256VDC12

MK1491-09FLN

MK20DN512VLL10一路原装价美

MK11DN512AVLK5 ARM微控制器 - MCU Kinetis K11: 50MHz Cortex-M4 Performance MCU, 512KB Flash, 64KB SRAM, Anti-tamper, 80-LQFP

MK20DX64VFT5

MK1575-01GLF 时钟发生器及支持产品

DdatasheetPDF页码索引