Super high dense cell design for low RDS(ON

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Super high dense cell design for low RDS(ON

N-CHANNEL SILICON POWER MOSFET

Features Maintains both low power loss and low noise Lower RDS(on) characteristic More controllable switching dv/dt by gate resistance Smaller VGS ringing waveform during switching Narrow band of the gate threshold voltage (3.0±0.5V) High avalanche durability Applica

Power filed Effect Transistor

FEATURES ◆ Robust High Voltage Termination ◆ Avalanche Energy Specified ◆ Source-to-Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode ◆ Diode is Characterized for Use in Bridge Circuits ◆ IDSS and VDS(on) Specified at Elevated Temperature

IGBT with integrated diode in packages offering space saving advantage

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IGBT with integrated diode in packages offering space saving advantage

文件：1.74081 Mbytes Page：16 Pages

POWER FIELD EFFECT TRANSISTOR

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