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MC100E15价格
参考价格:¥58.2412
型号:MC100E150FNG 品牌:ONS 备注:这里有MC100E15多少钱,2025年最近7天走势,今日出价,今日竞价,MC100E15批发/采购报价,MC100E15行情走势销售排行榜,MC100E15报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
6-BIT D LATCH Description The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset | ONSEMI 安森美半导体 | |||
6-BIT D REGISTER Description The MC10E/100E151 contains 6 D-type, edge-triggered, master-slave flip-flops with differential outputs. Data enters the master when both CLK1 and CLK2 are LOW, and is transferred to the slave when CLK1 or CLK2 (or both) go HIGH. The asynchronous Master Reset (MR) makes all Q outputs g | ONSEMI 安森美半导体 | |||
5-BIT 2:1 MUX-LATCH Description The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 | ONSEMI 安森美半导体 | |||
5-BIT 2:1 MUX-LATCH Description The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 | ONSEMI 安森美半导体 | |||
6-BIT 2:1 MUX-LATCH Description The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with single−ended outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 | ONSEMI 安森美半导体 | |||
3-BIT 4:1 MUX-LATCH Description The MC10E/100E156 contains three 4:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output date is controlled by the multiplexer select controls (SEL0, SEL1). A logic HIGH on either LE | ONSEMI 安森美半导体 | |||
QUAD 2:1 MULTIPLEXER Description The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select (SEL) inputs. The individual select control makes the devices well suited for random logic designs. The 100 Series contains temperature compensation. | ONSEMI 安森美半导体 | |||
QUAD 2:1 MULTIPLEXER The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select (SEL) inputs. The individual select control makes the devices well suited for random logic designs. • Individual Select Controls • 550ps Max. D to Output • 80 | Motorola 摩托罗拉 | |||
QUAD 2:1 MULTIPLEXER The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select (SEL) inputs. The individual select control makes the devices well suited for random logic designs. • Individual Select Controls • 550ps Max. D to Output • 80 | Motorola 摩托罗拉 | |||
QUAD 2:1 MULTIPLEXER The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select (SEL) inputs. The individual select control makes the devices well suited for random logic designs. • Individual Select Controls • 550ps Max. D to Output • 80 | Motorola 摩托罗拉 | |||
5-BIT 2:1 MULTIPLEXER Description The MC10E/100E158 contains five 2:1 multiplexers with differential outputs. The output data are controlled by the Select input (SEL). The 100 Series contains temperature compensation. Features • 600 ps Max. D to Output • 800 ps Max. SEL to Output • Differential Outputs • One VCC | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Latch 文件:79.56 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Latch 文件:79.56 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Latch 文件:79.56 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
封装/外壳:28-LCC(J 形引线) 包装:管件 描述:IC LATCH 6BIT D 5V ECL 28-PLCC 集成电路(IC) 锁存器 | ONSEMI 安森美半导体 | |||
封装/外壳:28-LCC(J 形引线) 包装:管件 描述:IC LATCH 6BIT D 5V ECL 28-PLCC 集成电路(IC) 锁存器 | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Latch 文件:79.56 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Latch 文件:79.56 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Register 文件:127.84 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
MC100E151: ECL 6-Bit D Flip-Flop Register | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Register 文件:127.84 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Register 文件:127.84 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6?륛it D Register 文件:155.48 Kbytes Page:7 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Register 文件:127.84 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6-Bit D Register 文件:127.84 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Mux-Latch 文件:127.21 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5-BIT 2:1 MUX-LATCH | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Mux-Latch 文件:127.21 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Mux-Latch 文件:127.21 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6?묪it 2:1 Mux?묹atch 文件:126.97 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
6-BIT 2:1 MUX-LATCH | ONSEMI 安森美半导体 | |||
5V ECL 6?묪it 2:1 Mux?묹atch 文件:126.97 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 6?묪it 2:1 Mux?묹atch 文件:126.97 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 3-Bit 4:1 Mux-Latch 文件:126.9 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 3-Bit 4:1 Mux-Latch 文件:126.9 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5 V ECL Quad 2:1 Multiplexer 文件:125.05 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5 V ECL Quad 2:1 Multiplexer 文件:125.05 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5 V ECL Quad 2:1 Multiplexer 文件:125.05 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5 V ECL Quad 2:1 Multiplexer 文件:125.05 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5 V ECL Quad 2:1 Multiplexer 文件:125.05 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Multiplexer 文件:78.46 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Multiplexer 文件:78.46 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Multiplexer 文件:78.46 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5?륛it 2:1 Multiplexer 文件:154.26 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Multiplexer 文件:78.46 Kbytes Page:8 Pages | ONSEMI 安森美半导体 | |||
5V ECL 5-Bit 2:1 Multiplexer 文件:78.46 Kbytes Page:8 Pages | ONSEMI 安森美半导体 |
MC100E15产品属性
- 类型
描述
- 型号
MC100E15
- 制造商
ONSEMI
- 制造商全称
ON Semiconductor
- 功能描述
6-BIT D LATCH
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
N/A |
24+ |
NA/ |
18 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
ONS |
22+ |
28PLCC |
20000 |
公司只做原装 品质保证 |
|||
MOTOROLA |
23+ |
PLCC |
7512 |
绝对全新原装!现货!特价!请放心订购! |
|||
MOTO |
NEW |
PLCC |
9526 |
代理全系列销售, 全新原装正品,价格优势,长期供应,量大可订 |
|||
25+ |
5 |
公司优势库存 热卖中! |
|||||
FREESCAL |
23+ |
BGAQFP |
8659 |
原装公司现货!原装正品价格优势. |
|||
MOTOROLA |
25+ |
PLCC-28 |
18000 |
原厂直接发货进口原装 |
|||
ONS |
25+23+ |
28PLCC |
23272 |
绝对原装正品全新进口深圳现货 |
|||
- |
23+ |
NA |
13000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
|||
MOTOROLA |
25+ |
PLCC |
4500 |
全新原装、诚信经营、公司现货销售! |
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