Description

The MC10E/100E151 contains 6 D-type, edge-triggered, master-slave flip-flops with differential outputs. Data enters the master when both CLK1 and CLK2 are LOW, and is transferred to the slave when CLK1 or CLK2 (or both) go HIGH. The asynchronous Master Reset (MR) makes all Q outputs go LOW.

The 100 Series contains temperature compensation.

Features

• 1100 MHz Min. Toggle Frequency

• Differential Outputs

• Asynchronous Master Reset

• Dual Clocks

• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V

with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V

with VEE = −4.2 V to −5.7 V

• Internal Input 50 k Pulldown Resistors

• ESD Protection: Human Body Model; > 2 kV,

Machine Model; > 200 V

• Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level:

Pb = 1

Pb−Free = 3

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in,

Oxygen Index: 28 to 34

• Transistor Count = 304 devices

• Pb−Free Packages are Available*