GAL22V10价格

参考价格:¥75.7917

型号:GAL22V10D-25LPI 品牌:Lattice Semi 备注:这里有GAL22V10多少钱,2025年最近7天走势,今日出价,今日竞价,GAL22V10批发/采购报价,GAL22V10行情走势销售排行榜,GAL22V10报价。
型号 功能描述 生产厂家 企业 LOGO 操作
GAL22V10

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL 22V10 Device Datasheet

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

Lattice

莱迪思

Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l

Lattice

莱迪思

GAL22V10产品属性

  • 类型

    描述

  • 型号

    GAL22V10

  • 制造商

    LATTICE

  • 功能描述

    A246A14

更新时间:2025-12-28 11:10:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE/莱迪斯
23+
DIP24
10000
原厂授权一级代理,专业海外优势订货,价格优势、品种
CY
23+
DIP
12800
##公司主营品牌长期供应100%原装现货可含税提供技术
AMD
24+
PLCC
1902
LINEAR/凌特
QQ咨询
DIP
104
全新原装 研究所指定供货商
LATTICE
18+
PLCC24
12500
全新原装正品,本司专业配单,大单小单都配
LATTICE
19+
DIP
15876
LATTICE
23+
PLCC
3220
原装正品公司现货价格优惠欢迎查询
GAL
11+
DIP
62000
原装正品现货优势18
LATTICE
23+24
DIP-
9680
原盒原标.进口原装.支持实单 .价格优势
LATTICE
22+
PLCC28
2000
进口原装!现货库存

GAL22V10数据表相关新闻