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CD74HCT107价格
参考价格：￥1.3224
型号：CD74HCT107E 品牌：TI 备注：这里有CD74HCT107多少钱，2025年最近7天走势，今日出价，今日竞价，CD74HCT107批发/采购报价，CD74HCT107行情走势销售排行榜，CD74HCT107报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CD74HCT107 | Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . | TI 德州仪器 |   | |
CD74HCT107 | 具有复位功能的高速 CMOS 逻辑双路负边沿触发式 J-K 触发器 | TI 德州仪器 | | |
CD74HCT107 | Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：56.86 Kbytes Page：8 Pages | TI 德州仪器 | | |
CD74HCT107 | Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：451.69 Kbytes Page：15 Pages | TI 德州仪器 | | |
CD74HCT107 | Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：624.14 Kbytes Page：16 Pages | TI 德州仪器 | | |
Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . | TI 德州仪器 | | ||
封装/外壳：14-DIP（0.300"，7.62mm） 功能：复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 14DIP 集成电路（IC） 触发器 | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：624.14 Kbytes Page：16 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：451.69 Kbytes Page：15 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：56.86 Kbytes Page：8 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：266.26 Kbytes Page：11 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：451.69 Kbytes Page：15 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：624.14 Kbytes Page：16 Pages | TI 德州仪器 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIA 安世 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIA 安世 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | |
CD74HCT107产品属性
- 类型
描述
- 型号
CD74HCT107
- 功能描述
触发器 Hi-Spd CMOS Dual Neg J-K Flip-Flop
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
PDIP14 |
924 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI(德州仪器) |
24+ |
PDIP14 |
1493 |
原装现货,免费供样,技术支持,原厂对接 |
|||
TI/德州仪器 |
25+ |
NA |
860000 |
明嘉莱只做原装正品现货 |
|||
HAR |
2015+ |
SOP/DIP |
19889 |
一级代理原装现货,特价热卖! |
|||
HAR |
25+ |
QFP |
3200 |
全新原装、诚信经营、公司现货销售! |
|||
HARRIS |
24+ |
DIP-14 |
1325 |
||||
Texas Instruments |
23+ |
14-PDIP |
3800 |
特惠实单价格秒出原装正品假一罚万 |
|||
TI |
22+ |
14DIP |
9000 |
原厂渠道,现货配单 |
|||
TI |
23+ |
14-DIP |
15000 |
TI现货商!原装正品! |
|||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
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CD74HCT107规格书下载地址
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深圳科雨电子有限公司，联系人：卢小姐 手机：18975515225 原装正品 大量现货，有需要的可以联系我 QQ:97877805 微信：wei555222777
2019-6-10
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