型号 功能描述 生产厂家 企业 LOGO 操作
CD74HCT107E.A

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . .

TI

德州仪器

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飞利浦

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIA

安世

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIA

安世

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飞利浦

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飞利浦

更新时间:2025-11-20 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
PDIP16
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
TI(德州仪器)
24+
PDIP16
1493
原装现货,免费供样,技术支持,原厂对接
TI
25+
DIP16
209
原装正品,假一罚十!
TI
24+/25+
50
原装正品现货库存价优
TI
22+
14DIP
9000
原厂渠道,现货配单
RCA
23+
DIP
10000
原厂授权一级代理,专业海外优势订货,价格优势、品种
HAR
2015+
SOP/DIP
19889
一级代理原装现货,特价热卖!
TI
25+23+
DIP16
48835
绝对原装正品现货,全新深圳原装进口现货
HAR
25+
QFP
3200
全新原装、诚信经营、公司现货销售!
24+
DIP
1188

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