CD4015B价格
参考价格:¥1.1133
型号:CD4015BE 品牌:TI 备注:这里有CD4015B多少钱,2026年最近7天走势,今日出价,今日竞价,CD4015B批发/采购报价,CD4015B行情走势销售排行榜,CD4015B报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CD4015B | CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | ||
CD4015B | CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | ||
CD4015B | CMOS 双路 4 级静态移位寄存器 CD4015B consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. \"Q\"outputs are available from each of the four stages on both registers. All register stages are D-type,master • Medium speed operation...12 MHz (typ.) clock rate at VDD VSS = 10 V\n• 8 master-slave flip-flops plus input and output buffering\n• 5-V, 10-V, and 15-V parametric ratings\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n• 2 V at VDD = 10 V\n•; | TI 德州仪器 | ||
CD4015B | CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | ||
丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BF;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CD4015BF;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BF;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BF3A;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CD4015BF3A;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BF3A;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
Dual 4-Bit Static Shift Register General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A | FAIRCHILD 仙童半导体 | |||
Dual 4-Bit Static Shift Register General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A | FAIRCHILD 仙童半导体 | |||
Dual 4-Bit Static Shift Register General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A | FAIRCHILD 仙童半导体 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r | INTERSIL | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r | INTERSIL | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS 双路 4 级静态移位寄存器 CD4015B consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. \"Q\"outputs are available from each of the four stages on both registers. All register stages are D-type,master • Medium speed operation...12 MHz (typ.) clock rate at VDD VSS = 10 V\n• 8 master-slave flip-flops plus input and output buffering\n• 5-V, 10-V, and 15-V parametric ratings\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n• 2 V at VDD = 10 V\n•; | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Features • High-Voltage Type (20V Rating) • Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V • Fully Static Operation • 8 Master-Slave Flip-Flops Plus Input and Output Buffering • 100 Tested For Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Standardized S | RENESAS 瑞萨 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. \"Q\" outputs are available from each of the four stages on both registers. All register stages are D type, ma • High-Voltage Type (20V Rating) \n• Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V \n• Fully Static Operation \n• 8 Master-Slave Flip-Flops Plus Input and Output Buffering \n• 100% Tested For Quiescent Current at 20V \n• 5V, 10V and 15V Parametric Ratings \n• Standardized Sym; | RENESAS 瑞萨 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages | INTERSIL | |||
丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r | INTERSIL | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
Dual 4-Bit Static Shift Register 文件:134.32 Kbytes Page:6 Pages | NSC 国半 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器 | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:管件 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器 | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
Dual 4-Bit Static Shift Register 文件:134.32 Kbytes Page:6 Pages | NSC 国半 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Dual 4-Bit Static Shift Register | FAIRCHILD 仙童半导体 | FAIRCHILD | ||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output | INTERSIL | INTERSIL | ||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output | INTERSIL | INTERSIL | ||
Dual 4-Bit Static Shift Register | NSC 国半 | NSC | ||
Dual 4-bit Static Shift Register | HITACHIHitachi Semiconductor 日立日立公司 | HITACHI | ||
Dual 4-bit static shift register | PHILIPS 飞利浦 | PHILIPS | ||
Dual 4-Bit Static Shift Register | ONSEMI 安森美半导体 | ONSEMI | ||
Dual 4-Bit Static Shift Register | ONSEMI 安森美半导体 | ONSEMI | ||
4−Bit Full Adder | ONSEMI 安森美半导体 | ONSEMI | ||
COMPLEMENTARY METAL OXIDE SILICON | NTE | NTE | ||
Dual 4-Stage Static Shift Register(with serial input/parallel output) | TOSHIBA 东芝 | TOSHIBA | ||
DUAL 4-STAGE STATIC SHIFT REGISTER (WITH SERIAL INPUT/PARALLEL OUTPUT) | TOSHIBA 东芝 | TOSHIBA |
CD4015B产品属性
- 类型
描述
- VCC(Min)(V):
3
- VCC(Max)(V):
18
- Voltage(Nom)(V):
10
- F @ nom voltage(Max)(MHz):
8
- ICC @ nom voltage(Max)(mA):
0.3
- tpd @ nom Voltage(Max)(ns):
160
- IOL(Max)(mA):
1.5
- IOH(Max)(mA):
-1.5
- 3-state output:
No
- Rating:
Catalog
- Operating temperature range(C):
-55 to 125
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
FSC |
23+ |
DIP |
8560 |
受权代理!全新原装现货特价热卖! |
|||
NSC |
2023+ |
DIP16 |
8800 |
正品渠道现货 终端可提供BOM表配单。 |
|||
TI |
25+ |
- |
21000 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
onsemi |
25+ |
16-PDIP |
18798 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
OKI |
23+ |
DIP |
3580 |
全新原装假一赔十 |
|||
TI/德州仪器 |
25+ |
DIP16 |
12360 |
TI/德州仪器原装特价CD4015BE即刻询购立享优惠#长期有货 |
|||
NS |
24+ |
DIP16 |
5650 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
25+ |
20 |
公司优势库存 热卖中! |
|||||
FSC |
99+ |
DIP-16 |
747 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
FAIRCHILD |
24+ |
DIP |
5000 |
仙童授权代理原装进口现货 |
CD4015B规格书下载地址
CD4015B参数引脚图相关
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- d126
- d1004
- d1002
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- CD4021
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- CD4020
- CD4019B
- CD40193
- CD40192
- CD4018B
- CD40182
- CD40181
- CD4018
- CD4017B
- CD4017A
- CD40174
- CD4017
- CD4016B
- CD40163
- CD40162BCN
- CD40162BCJ
- CD40162
- CD40161BMW
- CD40161BMJ
- CD40161BF
- CD40161BE
- CD40161BD
- CD40161BCN
- CD40161BCJ
- CD40161
- CD40160BMW
- CD40160BMJ
- CD40160BF
- CD40160BE
- CD40160BD
- CD40160BCN
- CD40160BCJ
- CD40160
- CD4016
- CD4015BF
- CD4015BE
- CD4015BD
- CD4015AF
- CD4015AE
- CD4015AD
- CD4015
- CD4014BF
- CD4014BE
- CD4014BD
- CD4014B
- CD4014AF
- CD4014AE
- CD4014AD
- CD4014
- CD4013BN
- CD4013BMW
- CD4013BMJ
- CD4013BF
- CD4013BE
- CD4013BD
- CD4013BCN
- CD4013BCJ
- CD4013B
- CD4013AF
- CD4013
- CD4012M
- CD4012C
- CD4012B
- CD4012A
- CD4012
- CD4011B
- CD4011A
- CD40117
- CD40116
- CD40110
- CD4011
- CD4010M
- CD4010C
- CD4010B
- CD40108
CD4015B数据表相关新闻
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DdatasheetPDF页码索引
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