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CD4015B价格
参考价格:¥1.1133
型号:CD4015BE 品牌:TI 备注:这里有CD4015B多少钱,2025年最近7天走势,今日出价,今日竞价,CD4015B批发/采购报价,CD4015B行情走势销售排行榜,CD4015B报价。型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
---|---|---|---|---|
CD4015B | CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | ||
CD4015B | CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | ||
CD4015B | CMOS 双路 4 级静态移位寄存器 | TI 德州仪器 | ||
CD4015B | CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | ||
Dual 4-Bit Static Shift Register General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Dual 4-Bit Static Shift Register General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Dual 4-Bit Static Shift Register General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r | Intersil | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r | Intersil | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages | Intersil | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Features • High-Voltage Type (20V Rating) • Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V • Fully Static Operation • 8 Master-Slave Flip-Flops Plus Input and Output Buffering • 100 Tested For Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Standardized S | RENESAS 瑞萨 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r | Intersil | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
Dual 4-Bit Static Shift Register 文件:134.32 Kbytes Page:6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器 | TI2 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:管件 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器 | TI2 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
Dual 4-Bit Static Shift Register 文件:134.32 Kbytes Page:6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-Stage Static Shift Register 文件:521.58 Kbytes Page:11 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 | |||
CMOS Dual 4-stage Static Shift Register 文件:884.25 Kbytes Page:15 Pages | TI 德州仪器 |
替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
---|---|---|---|---|
Dual 4-Bit Static Shift Register | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output | Intersil | Intersil | ||
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output | Intersil | Intersil | ||
Dual 4-Bit Static Shift Register | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | NSC | ||
Dual 4-bit Static Shift Register | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | ||
Dual 4-bit static shift register | Philips 飞利浦 | Philips | ||
Dual 4-Bit Static Shift Register | ONSEMI 安森美半导体 | ONSEMI | ||
Dual 4-Bit Static Shift Register | ONSEMI 安森美半导体 | ONSEMI | ||
4−Bit Full Adder | ONSEMI 安森美半导体 | ONSEMI | ||
COMPLEMENTARY METAL OXIDE SILICON | NTE | NTE | ||
Dual 4-Stage Static Shift Register(with serial input/parallel output) | TOSHIBA 东芝 | TOSHIBA | ||
DUAL 4-STAGE STATIC SHIFT REGISTER (WITH SERIAL INPUT/PARALLEL OUTPUT) | TOSHIBA 东芝 | TOSHIBA |
CD4015B产品属性
- 类型
描述
- 型号
CD4015B
- 制造商
TI
- 制造商全称
Texas Instruments
- 功能描述
CMOS DUAL 4-STAGE STATIC SHIFT REGISTER
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI/德州仪器 |
22+ |
DAP |
100000 |
代理渠道/只做原装/可含税 |
|||
PCA |
25+ |
DIP-16 |
65428 |
百分百原装现货 实单必成 |
|||
TI(德州仪器) |
24+/25+ |
10000 |
原装正品现货库存价优 |
||||
TI/德州仪器 |
25+ |
DIP16 |
12360 |
TI/德州仪器原装特价CD4015BE即刻询购立享优惠#长期有货 |
|||
TI |
12+ |
DIP16 |
2550 |
原装现货价格有优势量大可以发货 |
|||
TI |
24+ |
DIP16 |
20000 |
全新原厂原装,进口正品现货,正规渠道可含税!! |
|||
TI |
2130+ |
SOP |
442 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
22+ |
5000 |
||||||
TI(德州仪器) |
2024+ |
SOIC-16 |
500000 |
诚信服务,绝对原装原盘 |
|||
FAIRCHILD/仙童 |
24+ |
DIP16 |
31 |
大批量供应优势库存热卖 |
CD4015B芯片相关品牌
CD4015B规格书下载地址
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CD4015B数据表相关新闻
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