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CD4015价格

参考价格:¥1.1133

型号:CD4015BE 品牌:TI 备注:这里有CD4015多少钱,2026年最近7天走势,今日出价,今日竞价,CD4015批发/采购报价,CD4015行情走势销售排行榜,CD4015报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CD4015

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FAIRCHILD

仙童半导体

CD4015

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

INTERSIL

CD4015

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages

INTERSIL

CD4015

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description\nCD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages are • High-Voltage Type (20V Rating)\n• Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V\n• Fully Static Operation\n• 8 Master-Slave Flip-Flops Plus Input and Output Buffering\n• 100% Tested For Quiescent Current at 20V\n• 5V, 10V and 15V Parametric Ratings\n• Standardized Symmetric;

RENESAS

瑞萨

CD4015

4路移位寄存器

The CD4015 is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). • Supply voltage range:3V to 15V \n• Temperature range:-40℃ to +125℃\n• Packaging information: DIP16/SOP16/TSSOP16;

I-COREWUXI i-CORE Electronics Co., Ltd

中微爱芯无锡中微爱芯电子有限公司

CD4015

Dual 4-Bit Static Shift Register

General Description\nThe CD4015BM/CD4015BC contains two identical, 4-stage, serial-input/parallel-output registers with independent ``Data'', ``Clock,'' and ``Reset'' inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock tr Wide supply voltage range 3.0V to 18V\nHigh noise immunity 0.45 VDD(typ.)\nLow power TTL Fan out of 2 driving 74L\n  compatibility or 1 driving 74LS\nMedium speed operation 8 MHz (typ.) clock rate\nFully static design @VDD - VSS = 10V;

TI

德州仪器

CD4015

Dual 4-Bit Static Shift Register

文件:134.32 Kbytes Page:6 Pages

NSC

国半

CD4015

SEMICONDUCTORS

文件:2.43533 Mbytes Page:31 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BE;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BF;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CD4015BF;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BF;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BF3A;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CD4015BF3A;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BF3A;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CD4015BM;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FAIRCHILD

仙童半导体

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FAIRCHILD

仙童半导体

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FAIRCHILD

仙童半导体

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

INTERSIL

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

INTERSIL

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Features • High-Voltage Type (20V Rating) • Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V • Fully Static Operation • 8 Master-Slave Flip-Flops Plus Input and Output Buffering • 100 Tested For Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Standardized S

RENESAS

瑞萨

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages

INTERSIL

丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

丝印代码:CM015B;CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

INTERSIL

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

Dual 4-Bit Static Shift Register

文件:134.32 Kbytes Page:6 Pages

NSC

国半

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:管件 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

替换型号 功能描述 生产厂家 企业 LOGO 操作

Dual 4-bit Static Shift Register

HITACHIHitachi Semiconductor

日立日立公司

Dual 4-bit static shift register

PHILIPS

飞利浦

Dual 4-Bit Static Shift Register

ONSEMI

安森美半导体

Dual 4-Bit Static Shift Register

ONSEMI

安森美半导体

4−Bit Full Adder

ONSEMI

安森美半导体

COMPLEMENTARY METAL OXIDE SILICON

NTE

Dual 4-Stage Static Shift Register(with serial input/parallel output)

TOSHIBA

东芝

DUAL 4-STAGE STATIC SHIFT REGISTER (WITH SERIAL INPUT/PARALLEL OUTPUT)

TOSHIBA

东芝

CD4015产品属性

  • 类型

    描述

  • Function:

    Shift registers

  • Description:

    Dual 4-bit Static Shift Register

  • VCC (V):

    3.0 - 15.0

  • Logic switching levels:

    CMOS

  • Tamb (°C):

    -40~125

  • Nr of pins:

    16

  • Package:

    DIP16/SOP16/TSSOP16

更新时间:2026-5-15 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
25+
-
21000
正规渠道,免费送样。支持账期,BOM一站式配齐
TI
25+
CERDIP-16
21000
正规渠道,免费送样。支持账期,BOM一站式配齐
OKI
23+
DIP
3580
全新原装假一赔十
TI/德州仪器
25+
DIP16
12360
TI/德州仪器原装特价CD4015BE即刻询购立享优惠#长期有货
NS
24+
DIP16
5650
公司原厂原装现货假一罚十!特价出售!强势库存!
CD4015AE
25+
4
4
FAIRCHILD
24+
DIP
5000
仙童授权代理原装进口现货
FSC
25+23+
DIP16
46716
绝对原装正品现货,全新深圳原装进口现货
FSC全新原装
26+
DIP
9526
代理全系列销售, 全新原装正品,价格优势,长期供应,量大可订
FSC
2015+
SOP
19889
一级代理原装现货,特价热卖!

CD4015数据表相关新闻