CD4015价格

参考价格:¥1.1133

型号:CD4015BE 品牌:TI 备注:这里有CD4015多少钱,2025年最近7天走势,今日出价,今日竞价,CD4015批发/采购报价,CD4015行情走势销售排行榜,CD4015报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CD4015

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

Intersil

CD4015

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages

Intersil

CD4015

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

CD4015

Dual 4-Bit Static Shift Register

文件:134.32 Kbytes Page:6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

CD4015

SEMICONDUCTORS

文件:2.43533 Mbytes Page:31 Pages

etc2List of Unclassifed Manufacturers

etc未分类制造商etc2未分类制造商

CD4015

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

RENESAS

瑞萨

CD4015

4路移位寄存器

i-coreWUXI i-CORE Electronics Co., Ltd

中微爱芯无锡中微爱芯电子有限公司

CD4015

Dual 4-Bit Static Shift Register

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

Intersil

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

Intersil

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Features • High-Voltage Type (20V Rating) • Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V • Fully Static Operation • 8 Master-Slave Flip-Flops Plus Input and Output Buffering • 100 Tested For Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Standardized S

RENESAS

瑞萨

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages

Intersil

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ® Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

Features: ® Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ® Fully static operation ® 8 master-slave flip-flops plus input and output buffering ® 100% tested for quiescent current at 20 V ®5.V, 10-V, and 15-V parametric ratings ® Standardized, symmetr

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

Intersil

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

Dual 4-Bit Static Shift Register

文件:134.32 Kbytes Page:6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器

TI2

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

封装/外壳:16-DIP(0.300",7.62mm) 功能:串行至并行 包装:管件 描述:IC DUAL STATIC SHFT REG 16-DIP 集成电路(IC) 移位寄存器

TI2

德州仪器

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

CMOS Dual 4-Stage Static Shift Register

文件:521.58 Kbytes Page:11 Pages

TI

德州仪器

CMOS Dual 4-stage Static Shift Register

文件:884.25 Kbytes Page:15 Pages

TI

德州仪器

替换型号 功能描述 生产厂家 企业 LOGO 操作

Dual 4-bit Static Shift Register

HitachiHitachi Semiconductor

日立日立公司

Dual 4-bit static shift register

Philips

飞利浦

Dual 4-Bit Static Shift Register

ONSEMI

安森美半导体

Dual 4-Bit Static Shift Register

ONSEMI

安森美半导体

4−Bit Full Adder

ONSEMI

安森美半导体

COMPLEMENTARY METAL OXIDE SILICON

NTE

Dual 4-Stage Static Shift Register(with serial input/parallel output)

TOSHIBA

东芝

DUAL 4-STAGE STATIC SHIFT REGISTER (WITH SERIAL INPUT/PARALLEL OUTPUT)

TOSHIBA

东芝

CD4015产品属性

  • 类型

    描述

  • 型号

    CD4015

  • 制造商

    NSC

  • 制造商全称

    National Semiconductor

  • 功能描述

    Dual 4-Bit Static Shift Register

更新时间:2025-9-26 10:06:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
24+
N/A
51000
一级代理-主营优势-实惠价格-不悔选择
TI(德州仪器)
24+
DIP16
907
只做原装,提供一站式配单服务,代工代料。BOM配单
TI(德州仪器)
24+
TSSOP-16
13348
原厂可订货,技术支持,直接渠道。可签保供合同
TI德州仪器
22+
24000
原装正品现货,实单可谈,量大价优
FSC全新原装
23+
DIP
9526
TI
23+
CDIP
8560
受权代理!全新原装现货特价热卖!
TI
23+
DIP
1520
绝对全新原装!优势供货渠道!特价!请放心订购!
XINBOLE/芯伯乐
23+
DIP16
50000
全新原装正品现货,支持订货
TI
23+
16-TSSOP
15000
TI现货商!原装正品!
FAIRCHILD/仙童
24+
SOP16
9000
只做原装,欢迎询价,量大价优

CD4015数据表相关新闻