CD4002价格
参考价格:¥0.9678
型号:CD4002BE 品牌:TI 备注:这里有CD4002多少钱,2026年最近7天走势,今日出价,今日竞价,CD4002批发/采购报价,CD4002行情走势销售排行榜,CD4002报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CD4002 | 2路4输入或非门 The CD4002 is a dual 4-input NOR gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations.It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS • Wide supply voltage range from 3V to 15V\n• Fully static operation\n• 5V, 10V, and 15V parametric ratings\n• Standardized symmetrical output characteristics\n• Inputs and outputs are protected against electrostatic effects\n• Specified from -40℃ to +105℃\n• Packaging information: DIP14/SOP14/TSSOP; | I-COREWUXI i-CORE Electronics Co., Ltd 中微爱芯无锡中微爱芯电子有限公司 | ||
CD4002 | CD4002M/CD4002C Dual 4-Input NOR Gate, CD4012M/CD4012C Dual 4-Input NAND Gate General Description\nThese NOR and NAND gates are monolithic complementary MOS (CMOS) integrated circuits. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage. This results in high noise immunity over a wide suppl Wide supply voltage range 3.0V to 15V\nLow power 10 nW (typ.)\nHigh noise immunity 0.45 VDD (typ.)Applications\nAutomotive\nData terminals\nInstrumentation\nMedical Electronics\nAlarm system\nIndustrial controls\nRemote metering\nComputers; | TI 德州仪器 | ||
CD4002 | Dual 4-Input NOR(NAND) Gate 文件:107.87 Kbytes Page:6 Pages | NSC 国半 | ||
CD4002 | CMOS NOR Gates 文件:206.27 Kbytes Page:5 Pages | TI 德州仪器 | ||
丝印代码:CD4002BE;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002BE;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002BF;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002BF;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002BM;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002BM;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002BM;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002B;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CD4002B;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:7704403CA;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:7704403CA;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gate Description CD4000BMS - Dual 3 Plus Inverter CD4001BMS - Quad 2 Input CD4002BMS - Dual 4 Input CD4025BMS - Triple 3 Input CD4000BMS, CD4001BMS, CD4002BMS, and CD4025BMS NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing f | INTERSIL | |||
CMOS NOR Gate Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standard Symmetrical Output Characteristics • 100 Tested for Maximum Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Maximum Input Curre | RENESAS 瑞萨 | |||
丝印代码:CM002B;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CM002B;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
丝印代码:CM002B;CMOS NOR Gates Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov | TI 德州仪器 | |||
CMOS NOR Gates 文件:206.27 Kbytes Page:5 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
IC GATE NOR 2CH 4-INP 14DIP | ONSEMI 安森美半导体 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
封装/外壳:14-DIP(0.300",7.62mm) 包装:管件 描述:IC GATE NOR 2CH 4-INP 14DIP 集成电路(IC) 门和反相器 | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:管件 描述:IC GATE NOR 2CH 4-INP 14SOIC 集成电路(IC) 门和反相器 | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:952.17 Kbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:523.679 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NOR Gates 文件:1.18416 Mbytes Page:18 Pages | TI 德州仪器 |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
NOR GATE | STMICROELECTRONICS 意法半导体 | STMICROELECTRONICS | ||
Dual 4-input NOR Gate | HITACHIHitachi Semiconductor 日立日立公司 | HITACHI | ||
Dual 4-input NOR gate | PHILIPS 飞利浦 | PHILIPS | ||
Dual 4-input NOR gate | PHILIPS 飞利浦 | PHILIPS | ||
B-Suffix Series CMOS Gates | MOTOROLA 摩托罗拉 | MOTOROLA | ||
B-Suffix Series CMOS Gates | MOTOROLA 摩托罗拉 | MOTOROLA | ||
COMPLEMENTARY METAL OXIDE SILICON | NTE | NTE | ||
INPUT NOR GATE | RANDE | RANDE |
CD4002产品属性
- 类型
描述
- Function:
NOR gates
- Description:
Dual 4-input NOR gate
- VCC (V):
3.0 - 15.0
- Logic switching levels:
CMOS
- Tamb (°C):
-40~125
- Nr of pins:
14
- Package:
DIP14/SOP14/TSSOP14
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
25+ |
SOIC-14 |
18798 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
TI |
25+ |
N/A |
7786 |
原装正品现货,原厂订货,可支持含税原型号开票。 |
|||
NS |
23+ |
DIP |
20000 |
全新原装假一赔十 |
|||
TI/德州仪器 |
25+ |
SOP-14 |
32360 |
TI/德州仪器全新特价CD4002BM96即刻询购立享优惠#长期有货 |
|||
N/A |
24+/25+ |
6710 |
原装正品现货库存价优 |
||||
TI |
23+ |
NA |
20000 |
||||
TI |
25+ |
sop |
20000 |
原装 |
|||
TI |
22+ |
5000 |
只做原装鄙视假货15118075546 |
||||
UNKNOWN |
23+ |
NA |
9196 |
专做原装正品,假一罚百! |
|||
TI |
23+ |
sop |
5000 |
全新原装,支持实单,非诚勿扰 |
CD4002规格书下载地址
CD4002参数引脚图相关
- d126
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- CD4002MW
- CD4002MJ
- CD4002M
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