丝印代码：CD4002BF；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

丝印代码：CD4002BF；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

CMOS NOR Gates

文件：1.18416 Mbytes Page：18 Pages

CMOS NOR Gates

文件：523.679 Kbytes Page：12 Pages

CMOS NOR Gates

文件：952.17 Kbytes Page：19 Pages

CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

丝印代码：7704403CA；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

丝印代码：7704403CA；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

CMOS NOR Gates

文件：523.679 Kbytes Page：12 Pages

CMOS NOR Gates

文件：1.18416 Mbytes Page：18 Pages

CMOS NOR Gates

文件：952.17 Kbytes Page：19 Pages

Dual 4-input NOR gate

DESCRIPTION The HEF4002B provides the positive dual 4-input NOR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

Dual 4-input NOR gate

DESCRIPTION The HEF4002B provides the positive dual 4-input NOR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

Dual 4-input NOR gate

DESCRIPTION The HEF4002B provides the positive dual 4-input NOR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

Dual 4-input NOR gate

DESCRIPTION The HEF4002B provides the positive dual 4-input NOR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

Dual 4-input NOR gate

DESCRIPTION The HEF4002B provides the positive dual 4-input NOR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

CMOS NOR Gates

Dual 4-Input NOR(NAND) Gate

CMOS NOR Gates

NOR GATE

Dual 4-input NOR Gate

Dual 4-input NOR gate

Dual 4-input NOR gate

B-Suffix Series CMOS Gates

B-Suffix Series CMOS Gates

COMPLEMENTARY METAL OXIDE SILICON

INPUT NOR GATE