PRECISION LOW DRIFT VOLTAGE REFERENCES

Voltage Reference Family The MC1404 of ICs is a family of temperature–compensated voltage references for precision data conversion applications, such as A/D, D/A, V/F, and F/V. Advances in laser–trimming and ion–implanted devices, as well as monolithic fabrication techniques, make these devices s

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-bit binary counter

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

12-Bit Binary Counter

The MC14040B 12−stage binary counter is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. This part is designed with an input wave shaping circuit and 12 stages of ripple−carry binary counter. The device advances the count on the negative−going

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

四路透明锁存

The MC14042B Quad Transparent Latch is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can • Buffered Data Inputs\n• Common Clock\n• Clock Polarity Control\n• Q and Qbar Outputs\n• Double Diode Input Protection\n• Supply Voltage Range = 3.0 Vdc to 1 8 Vdc\n• Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range\n• Pb-Free Packages a;

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

CMOS LSI (LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

CMOS LSI(LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Phase Locked Loop

The MC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a s

Hex Buffer

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P–Channel and N–Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. Thes

Hex Buffer

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P–Channel and N–Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. Thes

Hex Buffer

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired.

Hex Buffer

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired.

HIGH VOLTAGE CAPACITORS MONOLITHIC CERAMIC TYPE

Ceramic Stand-off Insulators for RF-Equipment

14-Stage, 12-Stage Ripple Carry Binary Counters

14-Stage Ripple Carry Binary Counters . 12-Stage Ripple Carry Binary Counters . 14-Stage Ripple Carry Binary Counters

CMOS RIPPLE-CARRY BINARY COUNTER DIVIDERS

CMOS RIPPLE-CARRY BINARY COUNTER DIVIDERS

14-Stage, 12-Stage Ripple Carry Binary Counters

RIPPLE-CARRY BINARY COUNTER/DIVIDERS

RIPPLE-CARRY BINARY COUNTER/DIVIDERS

12-bit Binary Counter

12-stage binary counter

12-stage binary counter

TWELVE STAGE BINARY COUNTER

12 Stage Ripple-Carry Binary Counter/Dividers

12 STAGE RIPPLE - CARRY BINARY COUNTER/DIVIDERS