CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI Quad R?뭆 Latches

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CMOS MSI Quad R?뭆 Latches

文件：118.43 Kbytes Page：7 Pages

CMOS MSI Quad R?뭆 Latches

文件：143.25 Kbytes Page：7 Pages

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC LATCH R-S QUAD P/N 16SOEIAJ 集成电路（IC） 锁存器

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.

CMOS MSI(Quad R-S Latches)

The MC14043B and MC14044B quad R−S latches are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three−state buffers having a common enable input.