Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

CMOS LSI (LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

CMOS LSI(LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC TRANSP LATCH QUAD P/N 16-SOIC 集成电路（IC） 锁存器

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC TRANSP LATCH QUAD P/N 16-SOIC 集成电路（IC） 锁存器

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Inductive Sensor – Ring Sensor

Features ■Rectangular, height 30 mm ■Plastic, PA12‐GF30 ■Pulse duration 100 ms ■Sensitivity adjusted via potentiometer ■DC 3-wire, 10…30 VDC ■Dynamic output behaviour ■NO contact, PNP output ■M12 x 1 male connector Functional principle Inductive sensors detect metal objects contactless

Quadruple Latch

Flat cylinder

文件：87.62 Kbytes Page：1 Pages

140MHz SAW Filter 0.3MHz Bandwidth

文件：143.91 Kbytes Page：3 Pages

140MHz SAW Filter 0.3MHz Bandwidth

文件：138.4 Kbytes Page：3 Pages

CMOS Quad Clocked 'D' Latch

CMOS Quad Clocked 'D' Latch

CMOS Quad Clocked 'D' Latch

QUAD CLOCKED D LATCH

Quadruple Latch

Quadruple D-latch

Quadruple D-latch