Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

Quad transparent latch

四路透明锁存

The MC14042B Quad Transparent Latch is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can • Buffered Data Inputs\n• Common Clock\n• Clock Polarity Control\n• Q and Qbar Outputs\n• Double Diode Input Protection\n• Supply Voltage Range = 3.0 Vdc to 1 8 Vdc\n• Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range\n• Pb-Free Packages a;

CMOS LSI (LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

CMOS LSI(LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

QUAD TRANSPARENT LATCH

The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches c

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC TRANSP LATCH QUAD P/N 16-SOIC 集成电路（IC） 锁存器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC TRANSP LATCH QUAD P/N 16-SOIC 集成电路（IC） 锁存器

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

Quad Transparent Latch

文件：101.21 Kbytes Page：6 Pages

Quad Transparent Latch

文件：100.81 Kbytes Page：8 Pages

CMOS Quad Clocked 'D' Latch

CMOS Quad Clocked 'D' Latch

CMOS Quad Clocked 'D' Latch

QUAD CLOCKED D LATCH

Quadruple Latch

Quadruple D-latch

Quadruple D-latch