型号 功能描述 生产厂家&企业 LOGO 操作
K4H511638D

512MbD-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung
K4H511638D

DDRSDRAMProductGuide

ConsumerMemory

SamsungSamsung Group

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Samsung
K4H511638D

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

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Samsung

512MbC-dieDDRSDRAMSpecification

文件:212.57 Kbytes Page:24 Pages

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

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Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

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Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbD-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

三星三星半导体

Samsung

512MbD-dieDDRSDRAMSpecification66TSOP-IIwithPb-Free(RoHScompliant)

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Dif

SamsungSamsung Group

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Samsung

512MbB-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Differentialcl

SamsungSamsung Group

三星三星半导体

Samsung

512MbB-dieDDRSDRAMSpecification

KeyFeatures •VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 •VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) •Fourbanksoperation •Differentialcl

SamsungSamsung Group

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Samsung

512MbB-dieDDRSDRAMSpecification

文件:392.89 Kbytes Page:24 Pages

SamsungSamsung Group

三星三星半导体

Samsung

512MbB-dieDDRSDRAMSpecification

文件:392.89 Kbytes Page:24 Pages

SamsungSamsung Group

三星三星半导体

Samsung

K4H511638D产品属性

  • 类型

    描述

  • 型号

    K4H511638D

  • 制造商

    SAMSUNG

  • 制造商全称

    Samsung semiconductor

  • 功能描述

    DDR SDRAM Product Guide

更新时间:2024-5-13 22:58:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
SAMSUNG
2016+
TSOP
5000
全新原装现货,只售原装,假一赔十!
SAMSUNG
23+
TSOP66
40440
SAMSUNG原装存储芯片-诚信为本
SAMSUNG
23+
标准封装
18000
SAMSUNG
2016+
TSOP
6523
只做进口原装现货!假一赔十!
SAMSUNG
23+
BGA
20000
全新原装热卖/假一罚十!更多数量可订货
SANSUNG
2020+
TSOP
350000
100%进口原装正品公司现货库存
SAMSUNG/三星
21+
TSOP
10000
全新原装 公司现货 价优
SAMSUNG/三星
21+
TSOP
11600
优势代理渠道,原装正品,可全系列订货开增值税票
SAMSUNG
08+
ROHS
12
全新原装!优势库存热卖中!
SAMSUNG
23+24
TSOP-
9680
原盒原标.进口原装.支持实单 .价格优势

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