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CD4023B价格

参考价格:¥0.0000

型号:CD4023BD3 品牌:RCA 备注:这里有CD4023B多少钱,2026年最近7天走势,今日出价,今日竞价,CD4023B批发/采购报价,CD4023B行情走势销售排行榜,CD4023B报价。
型号 功能描述 生产厂家 企业 LOGO 操作

丝印代码:CD4023B;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023B;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CD4023B

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CD4023B

4 通道、2 输入、3V 至 18V 与非门

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Noise margin (over full package temperature range:     1 V at VDD = 5 V     2 V at VDD = 10 V     2.5 at VDD = 15 V\n• Meets all re;

TI

德州仪器

CD4023B

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

FAIRCHILD

仙童半导体

CD4023B

CMOS NAND Gates

Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I

INTERSIL

CD4023B

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

CD4023B

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

CD4023B

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CD4023B

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

丝印代码:CD4023BE;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BE;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BE;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BF;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BF;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BF3A;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BF3A;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BM;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BM;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BM;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CD4023BM;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

FAIRCHILD

仙童半导体

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

FAIRCHILD

仙童半导体

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

FAIRCHILD

仙童半导体

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

FAIRCHILD

仙童半导体

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS 三路 3 输入与非门

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Noise margin (over full package temperature range:     1 V at VDD = 5 V     2 V at VDD = 10 V     2.5 at VDD = 15 V\n• Meets all re;

TI

德州仪器

CMOS NAND Gates

Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standardized Symmetrical Output Characteristics • Maximum Input Current of 1A at 18V Over Full PackageTemperature Range; 100nA at 18V and +25oC • 100 Te

RENESAS

瑞萨

CMOS NAND Gate

CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 Input\nCD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\nThe CD4011B • High-Voltage Types (20V Rating) \n• Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V \n• Buffered Inputs and Outputs \n• Standardized Symmetrical Output Characteristics \n• Maximum Input Current of 1µA at 18V Over Full Package- Temperature Range; 100nA at 18V and +25oC \n• 100% Tes;

RENESAS

瑞萨

CMOS NAND Gates

Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I

INTERSIL

丝印代码:CM023B;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CM023B;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

丝印代码:CM023B;CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件:523.01 Kbytes Page:12 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

封装/外壳:14-DIP(0.300",7.62mm) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NAND 3CH 3-INP 14DIP 集成电路(IC) 门和反相器

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件:523.01 Kbytes Page:12 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件:523.01 Kbytes Page:12 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件:523.01 Kbytes Page:12 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NAND 3CH 3-INP 14SOIC 集成电路(IC) 门和反相器

TI

德州仪器

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件:523.01 Kbytes Page:12 Pages

TI

德州仪器

替换型号 功能描述 生产厂家 企业 LOGO 操作

Buffered Triple 3-Input NAND,NOR Gate

NSC

国半

CMOS NAND Gates

INTERSIL

Buffered Triple 3-Input NAND Gate

FAIRCHILD

仙童半导体

Triple 3-Input NAND(NOR) Gate

NSC

国半

Triple 3-input NAND Gate

HITACHIHitachi Semiconductor

日立日立公司

Triple 3-input NAND gate

PHILIPS

飞利浦

Triple 3-input NAND gate

PHILIPS

飞利浦

B-Suffix Series CMOS Gates

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

MOTOROLA

摩托罗拉

B-SUFFIX SERIES CMOS GATES

ONSEMI

安森美半导体

B−Suffix Series CMOS Gates

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

MOTOROLA

摩托罗拉

B-SUFFIX SERIES CMOS GATES

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

MOTOROLA

摩托罗拉

COMPLEMENTARY METAL OXIDE SILICON

NTE

INPUT NAND GATE

RANDE

CD4023B产品属性

  • 类型

    描述

  • Supply voltage (Min) (V):

    3

  • Supply voltage (Max) (V):

    18

  • Number of channels (#):

    4

  • Inputs per channel:

    2

  • IOL (Max) (mA):

    1.5

  • IOH (Max) (mA):

    -1.5

  • Input type:

    Standard CMOS

  • Output type:

    Push-Pull

  • Features:

    Standard speed (tpd > 50ns)

  • Data rate (Max) (Mbps):

    8

  • Rating:

    Catalog

更新时间:2026-5-15 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
25+
SO(NS)-14
21000
正规渠道,免费送样。支持账期,BOM一站式配齐
TI
25+
SO(NS)-14
20948
样件支持,可原厂排单订货!
TI
23+
14-SOP
65600
TI
12+
SOP14
3195
一级代理,专注军工、汽车、医疗、工业、新能源、电力
TI
25+
SOP14
20000
原装
TI
23+
NA
20000
TI/德州仪器
25+
SOP
880000
明嘉莱只做原装正品现货
TI(德州仪器)
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
TI
23+
SOP14
5000
全新原装,支持实单,非诚勿扰
Texas Instruments
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!

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