72V3611价格

参考价格:¥581.5678

型号:72V36110L10PF 品牌:IDT 备注:这里有72V3611多少钱,2025年最近7天走势,今日出价,今日竞价,72V3611批发/采购报价,72V3611行情走势销售排行榜,72V3611报价。
型号 功能描述 生产厂家&企业 LOGO 操作
72V3611

3.3 VOLT CMOS SyncFIFOTM 64 x 36

FEATURES: • 64 x 36 storage capacity • Supports clock frequencies up to 67MHz • Fast access times of 10ns • Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • Synchronous data buffering from Port A to Port

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT CMOS SyncFIFOTM 64 x 36

FEATURES: • 64 x 36 storage capacity • Supports clock frequencies up to 67MHz • Fast access times of 10ns • Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • Synchronous data buffering from Port A to Port

RENESAS

瑞萨

3.3 VOLT CMOS SyncFIFOTM 64 x 36

FEATURES: • 64 x 36 storage capacity • Supports clock frequencies up to 67MHz • Fast access times of 10ns • Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • Synchronous data buffering from Port A to Port

RENESAS

瑞萨

封装/外壳:128-LQFP 功能:同步 包装:托盘 描述:IC FIFO SYNC 131KX36 10NS 128QFP 集成电路(IC) FIFO 存储器

ETC

知名厂家

封装/外壳:128-LQFP 功能:同步 包装:管件 描述:IC FIFO SYNC 131KX36 128QFP 集成电路(IC) FIFO 存储器

ETC

知名厂家

3.3 VOLT CMOS SyncFIFO

文件:334.01 Kbytes Page:19 Pages

IDT

3.3 VOLT CMOS SyncFIFO

文件:334.01 Kbytes Page:19 Pages

IDT

3.3 VOLT CMOS SyncFIFO 64 x 36

DESCRIPTION: The IDT72V3611 is a pin and functionally compatible version of the IDT723611, designed to run off a 3.3V supply for exceptionally low power consumption. This device is a monolithic, high-speed, low-power, CMOS Synchronous (clocked) FIFO memory which supports clock frequencies up to 6

IDT

72V3611产品属性

  • 类型

    描述

  • 型号

    72V3611

  • 制造商

    Integrated Device Technology Inc

  • 功能描述

    FIFO Mem Sync Dual Depth/Width Uni-Dir 128K x 36 128-Pin TQFP

更新时间:2025-8-10 9:11:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
IDT
23+
NA
7890
原装正品代理渠道价格优势
24+
N/A
47000
一级代理-主营优势-实惠价格-不悔选择
IDT
20+
NA
67500
原装优势主营型号-可开原型号增税票
IDT
23+
QFP
1
现货库存
IDT, Integrated Device Technol
24+
128-TQFP(14x20)
53200
一级代理/放心采购
IDT
23+
QFP
800
全新原装正品现货,支持订货
N
24+
N
7950
只做全新原装进口现货
RENESAS(瑞萨)/IDT
24+
TQFP128(14x20)
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
IDT, Integrated Device Technol
21+
132-BQFP 缓冲式
36
100%进口原装!长期供应!绝对优势价格(诚信经营)
IDT
24+
原厂封装
2000
原装现货假一罚十

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