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72V36110价格

参考价格:¥581.5678

型号:72V36110L10PF 品牌:IDT 备注:这里有72V36110多少钱,2026年最近7天走势,今日出价,今日竞价,72V36110批发/采购报价,72V36110行情走势销售排行榜,72V36110报价。
型号 功能描述 生产厂家 企业 LOGO 操作
72V36110

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

72V36110

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

72V36110

128K x 36 SuperSync II FIFO, 3.3V

The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications Pin compatible to the SuperSync II 72V36x0 family\nUp to 166 MHz Operation of the Clocks\nUser selectable Asynchronous read and/or write ports (PBGA Only)\nUser selectable input and output port bus-sizing\n5V input tolerant\nAuto power down minimizes standby power consumption\nMaster Reset clears en;

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

• Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (PBGA & CABGA Only) • User selectable input and

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

封装/外壳:128-LQFP 功能:同步 包装:托盘 描述:IC FIFO SYNC 131KX36 10NS 128QFP 集成电路(IC) FIFO 存储器

RENESAS

瑞萨

封装/外壳:128-LQFP 功能:同步 包装:管件 描述:IC FIFO SYNC 131KX36 128QFP 集成电路(IC) FIFO 存储器

RENESAS

瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC??II 36-BIT FIFO

DESCRIPTION: The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

IDT

72V36110产品属性

  • 类型

    描述

  • 型号

    72V36110

  • 制造商

    Integrated Device Technology Inc

  • 功能描述

    FIFO Mem Sync Dual Depth/Width Uni-Dir 128K x 36 128-Pin TQFP

更新时间:2026-5-25 11:38:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
N
2517+
N
8850
只做原装正品现货或订货假一赔十!
IDT
20+
NA
67500
原装优势主营型号-可开原型号增税票
26+
N/A
76000
一级代理-主营优势-实惠价格-不悔选择
RENESAS(瑞萨)/IDT
2447
PBGA-144(13x13)
315000
1个/托盘一级代理专营品牌!原装正品,优势现货,长期
IDT
最新
QFP
7823
原装进口现货库存专业工厂研究所配单供货
IDT
23+
NA
7890
原装正品代理渠道价格优势
IDT/RENESAS
25+
PKG128
24500
瑞萨全系列在售
Renesas Electronics Corporatio
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
IDT
16+
7890
进口原装正品
Renesas
25+
电联咨询
7800
公司现货,提供拆样技术支持

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