3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input

封装/外壳：128-LQFP 功能：同步 包装：管件 描述：IC FIFO SYNC 131KX36 6NS 128QFP 集成电路（IC） FIFO 存储器

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

封装/外壳：128-LQFP 功能：同步 包装：管件 描述：IC MEM FIFO 131KX36 128QFP 集成电路（IC） FIFO 存储器

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36

FEATURES: • Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36 • Higher density, 2Meg and 4Meg SuperSync II FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asynchronous read and/or write ports (CABGA Only) • User selectable input