71V65603价格

参考价格:¥103.6174

型号:71V65603S100BGI 品牌:IDT 备注:这里有71V65603多少钱,2025年最近7天走势,今日出价,今日竞价,71V65603批发/采购报价,71V65603行情走势销售排行榜,71V65603报价。
型号 功能描述 生产厂家 企业 LOGO 操作
71V65603

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

71V65603

3.3V 256K X 36 ZBT Synchronous 3.3V I/O PipeLined SRAM

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs ZBT™ Feature 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high performance system speed - 150MHz (3.8ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (

RENESAS

瑞萨

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:368 Kbytes Page:26 Pages

IDT

71V65603产品属性

  • 类型

    描述

  • 型号

    71V65603

  • 功能描述

    静态随机存取存储器 256Kx36 ZBT SYNC 3.3V PIPELINED 静态随机存取存储器

  • RoHS

  • 制造商

    Cypress Semiconductor

  • 存储容量

    16 Mbit

  • 组织

    1 M x 16

  • 访问时间

    55 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    2.2 V

  • 最大工作电流

    22 uA

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    TSOP-48

  • 封装

    Tray

更新时间:2025-12-26 8:46:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
IDT
24+
100TQFP
8000
新到现货,只做全新原装正品
RENESAS
原厂封装
9800
原装进口公司现货假一赔百
RENESAS(瑞萨)/IDT
2021+
CABGA-165(13x15)
499
SMSC
16+
TSOP32
4000
进口原装现货/价格优势!
IDT
23+
QFP
98900
原厂原装正品现货!!
RENESAS(瑞萨)/IDT
24+
TQFP100(14x20)
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
IDT
26+
100TQFP
12000
原装,正品
IDT, Integrated Device Technol
21+
64-LBGA
5280
进口原装!长期供应!绝对优势价格(诚信经营
IDT
BGAQFP
6688
15
现货库存
IDT
24+
原厂封装
2000
原装现货假一罚十

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