71T75价格

参考价格:¥156.5175

型号:71T75602S133BGGI 品牌:IDT 备注:这里有71T75多少钱,2025年最近7天走势,今日出价,今日竞价,71T75批发/采购报价,71T75行情走势销售排行榜,71T75报价。
型号 功能描述 生产厂家 企业 LOGO 操作

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

71T75产品属性

  • 类型

    描述

  • 型号

    71T75

  • 功能描述

    静态随机存取存储器

  • RoHS

  • 制造商

    Cypress Semiconductor

  • 存储容量

    16 Mbit

  • 组织

    1 M x 16

  • 访问时间

    55 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    2.2 V

  • 最大工作电流

    22 uA

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    TSOP-48

  • 封装

    Tray

更新时间:2025-12-28 16:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Renesas
25+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
71T75602S166BGI
25+
10
10
RENESAS(瑞萨)/IDT
2447
PBGA-119(14x22)
315000
1000个/圆盘一级代理专营品牌!原装正品,优势现货,
RENESAS(瑞萨)/IDT
24+
PBGA-119(14x22)
16508
原装正品现货支持实单
IDT, Integrated Device Technol
21+
119-BGA
5280
进口原装!长期供应!绝对优势价格(诚信经营
IDT
23+
BGA
5000
原厂授权代理,海外优势订货渠道。可提供大量库存,详
24+
N/A
82000
一级代理-主营优势-实惠价格-不悔选择
IDT
25+
QFP100
2020
长期原装现货,特价供应!
Renesas
25+
电联咨询
7800
公司现货,提供拆样技术支持
IDT, Integrated Device Technol
24+
100-TQFP(14x20)
56200
一级代理/放心采购

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