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位置：首页 > IC中文资料第4866页 > UPD446

型号 功能描述 生产厂家 企业 LOGO 操作
UPD44644092A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644092AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644092AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644092AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644095A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644095AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644095AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644095AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644182A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644182AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644182AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644182AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644184A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644184AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644184AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644184AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644185A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644185AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644185AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644185AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data

RENESAS

瑞萨

UPD44644362A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644362AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644362AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644362AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44644364A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644364AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644364AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44644364AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Four-tick burst for reduced address frequency • Tw

RENESAS

瑞萨

UPD44645092A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645092AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645092AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645092AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645094A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645094AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645094AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645094AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645182A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645182AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645182AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645182AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645184A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645184AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645184AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645184AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645362A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645362AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645362AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645362AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645364A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645364AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645364AF5-E40-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44645364AF5-E50-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE opera

RENESAS

瑞萨

UPD44646092A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646092AF5-E25-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646092AF5-E30-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646092AF5-E33-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646093A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646182A-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646182AF5-E25-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD44646182AF5-E30-FQ1-A

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • DLL/PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two

RENESAS

瑞萨

UPD446产品属性

  • 类型

    描述

  • 型号

    UPD446

  • 功能描述

    SRAM DDRII 72MBIT 165-PBGA

  • RoHS

    是

  • 类别

    集成电路(IC) >> 存储器

  • 系列

    -

  • 标准包装

    3,000

  • 系列

    - 格式 -

  • 存储器

    EEPROMs - 串行

  • 存储器类型

    EEPROM

  • 存储容量

    8K(1K x 8)

  • 速度

    400kHz

  • 接口

    I²C，2 线串口

  • 电源电压

    1.7 V ~ 5.5 V

  • 工作温度

    -40°C ~ 85°C

  • 封装/外壳

    8-SOIC（0.154，3.90mm 宽）

  • 供应商设备封装

    8-SOIC

  • 包装

    带卷(TR)

UPD446供应商更多...

更新时间：2025-12-26 17:07:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
深圳市拓亿芯电子有限公司
UPD44645182AF5-E40-FQ1-A
RENESAS
25+
BGA
30000
代理全新原装现货,价格优势
询价
深圳市冠亿通科技有限公司
UPD44645182AF5-E50-FQ1-A
Renesas
25+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
询价
贸泽芯城（深圳）电子科技有限公司
UPD44645182AF5-E33-FQ1
RENESAS/瑞萨
23+
1005
11200
原厂授权一级代理、全球订货优势渠道、可提供一站式BO
询价
深圳市东来宝电子科技有限公司
UPD44645182AF5-E40-FQ1
RENESAS/瑞萨
24+
BGA
21574
郑重承诺只做原装进口现货
询价
深圳市科恒伟业电子有限公司
UPD44645182AF5-E40-FQ1
RENESAS/瑞萨
2450+
BGA
9485
只做原装正品现货或订货假一赔十!
询价
洪芯国际半导体（深圳）有限公司
UPD44645182AF5-E40-FQ1
RENESAS/瑞萨
25+
SOT-23
86720
全新原装进口现货价格优惠 本公司承诺原装正品假一赔
询价
深圳市凌旭科技有限公司
UPD44645182AF5-E40-FQ1
RENRSAS
21+
BGA
1709
询价
深圳市美思瑞电子科技有限公司
UPD44645182AF5-E40-FQ1
RENRSAS
22+
BGA
12245
现货,原厂原装假一罚十!
询价
深圳市华来深电子有限公司
UPD44645182AF5-E40-FQ1
RENESAS
23+
BGA
8560
受权代理!全新原装现货特价热卖!
询价
艾睿（深圳）半导体有限公司
UPD44645182AF5-E40-FQ1
RENESAS/瑞萨
2447
BGA
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
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  • UPD70F3380M2GJA1-GAE-AX微控制器

    UPD70F3380M2GJA1-GAE-AX 进口代理

    2025-8-12

  • UPD30181AYF1-131-GA3-A 瑞智芯 只有原装

    深圳市瑞智芯科技有限公司 联系人：彭先生 QQ：2851196982 直线：0755-82991809 手机：13787628849 邮箱：pc@szruizhixin.com 地址：深圳市福田区中航路42号中航北苑大厦A座6A2 型号：UPD30181AYF1-131-GA3-A 品牌：Renesas 包装：50 封装：BGA240

    2021-9-3

  • UPD720114GA-YEU-AT

    UPD720114GA-YEU-AT，当天发货0755-82732291全新原装现货或门市自取.

    2020-11-22

  • UPD720114GA-9EU-A

    UPD720114GA-9EU-A，当天发货0755-82732291全新原装现货或门市自取.

    2020-11-22

  • UPD16818GR-8JG-步进电机控制器/驱动器

    描述 该mPD16818是单片双H桥驱动器集成电路，它使用其输出级N沟道功率MOS场效应管。通过雇用输出级的功率MOS场效应晶体管，该驱动电路的电压和饱和度大幅提高功耗比传统的驱动电路，使用双极晶体管。此外，驱动电流可以调节，在节电模式下使用外部电阻器。因此，该mPD16818作为一个两相励磁驱动电路的理想，双极步进电机驱动头执行器的一个FDD。 特征 •兼容电源电压3V-/5V- •引脚兼容与mPD16803 •低（顶部和底部的ON电阻马鞍山FET的总和）ON电阻 R

    2013-2-5

  • UPD16813-整体式双H桥驱动器电路

    描述 该mPD16813是单片双H桥驱动电路，在它的驱动级功率MOS场效应管。通过补充P通道和N通道的输出级，电路电流大幅inproved相对于传统电荷泵驱动程序。该mPD16813因此作为2相励磁驱动电路的理想，双极步进电机驱动头部的一个FDD驱动器。 特征 •低（顶部和底部的ON电阻晶体管的总和）ON电阻RON的典型值=2.0瓦特。 •低电流消耗：国际直拨电话= 100 mA最大。 •降噪电路，操作时INC已关闭。 •小型表面贴装封装：16引脚SOP的塑

    2013-2-5

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