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ADS54J40IRMPT.A中文资料
ADS54J40IRMPT.A数据手册规格书PDF详情
1 Features
• 14-bit resolution, dual-channel, 1-GSPS ADC
• Noise floor: –158 dBFS/Hz
• Spectral performance (fIN = 170 MHz at –1 dBFS):
– SNR: 69.0 dBFS
– NSD: –155.9 dBFS/Hz
– SFDR: 86 dBc (Including Interleaving Tones)
– SFDR: 89 dBc (Except HD2, HD3, and
interleaving tones)
• Spectral performance (fIN = 350 MHz at –1 dBFS):
– SNR: 66.3 dBFS
– NSD: –153.3 dBFS/Hz
– SFDR: 75 dBc
– SFDR: 85 dBc (except HD2, HD3, and
interleaving tones)
• Channel isolation: 100 dBc at fIN = 170 MHz
• Input full-scale: 1.9 VPP
• Input bandwidth (3 dB): 1.2 GHz
• On-chip dither
• Integrated wideband DDC block
• JESD204B interface with subclass 1 support:
– 2 lanes per ADC at 10.0 Gbps
– 4 lanes per ADC at 5.0 Gbps
– Support for multi-chip synchronization
• Power dissipation: 1.35 W/ch at 1 GSPS
• Package: 72-pin VQFNP (10 mm × 10 mm)
2 Applications
• Radar and antenna arrays
• Broadband wireless
• Cable CMTS, DOCSIS 3.1 receivers
• Communications test equipment
• Microwave receivers
• Software Defined Radio (SDR)
• Digitizers
• Medical imaging and diagnostics
3 Description
The ADS54J40 is a low-power, wide-bandwidth, 14-
bit, 1.0-GSPS, dual-channel, analog-to-digital
converter (ADC). Designed for high signal-to-noise
ratio (SNR), the device delivers a noise floor of –158
dBFS/Hz for applications aiming for highest dynamic
range over a wide instantaneous bandwidth. The
device supports the JESD204B serial interface with
data rates up to 10.0 Gbps, supporting two or four
lanes per ADC. The buffered analog input provides
uniform input impedance across a wide frequency
range and minimizes sample-and-hold glitch energy.
Each ADC channel optionally can be connected to a
wideband digital down-converter (DDC) block. The
ADS54J40 provides excellent spurious-free dynamic
range (SFDR) over a large input frequency range with
very low power consumption.
The JESD204B interface reduces the number of
interface lines, allowing high system integration
density. An internal phase-locked loop (PLL) multiplies
the ADC sampling clock to derive the bit clock that is
used to serialize the 14-bit data from each channel.
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI/德州仪器 |
23+ |
5000 |
原厂授权代理,海外优势订货渠道。可提供大量库存,详 |
||||
TI/德州仪器 |
23+ |
VQFN-72 |
6500 |
专注配单,只做原装进口现货 |
|||
TI/德州仪器 |
25+ |
VQFN-72 |
10000 |
全新原装现货库存 |
|||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
||||
TexasInstruments |
24+ |
SMD |
768 |
数据转换IC开发工具 |
|||
TI |
25+ |
DFN-72 |
36 |
就找我吧!--邀您体验愉快问购元件! |
|||
TI |
22+ |
72VQFN |
9000 |
原厂渠道,现货配单 |
|||
TI |
1731+ |
N/A |
7 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
TI/德州仪器 |
24+ |
N/A |
1500 |
只供应原装正品 欢迎询价 |
|||
TI/德州仪器 |
24+ |
NA |
22330 |
郑重承诺只做原装进口现货 |
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