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SN74LS11价格
参考价格：￥1.9428
型号：SN74LS112AD 品牌：TI 备注：这里有SN74LS11多少钱，2025年最近7天走势，今日出价，今日竞价，SN74LS11批发/采购报价，SN74LS11行情走势销售排行榜，SN74LS11报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74LS11 | TRIPLE 3-INPUT POSITIVE-AND GATES 文件：153.88 Kbytes Page：5 Pages | TI 德州仪器 |   | |
SN74LS11 | TRIPLE 3-INPUT POSITIVE-AND GATES 文件：179.08 Kbytes Page：7 Pages | TI 德州仪器 | | |
SN74LS11 | TRIPLE 3-INPUT POSITIVE-AND GATES 文件：1.096 Mbytes Page：17 Pages | TI 德州仪器 | | |
SN74LS11 | 3 通道、3 输入、4.75V 至 5.25V 双极与门 | TI 德州仪器 | | |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to cha | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to cha | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to cha | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the | Motorola 摩托罗拉 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY | Motorola 摩托罗拉 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY | Motorola 摩托罗拉 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
74系列逻辑芯片 | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS 文件：1.32368 Mbytes Page：20 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR 文件：697.41 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET 文件：259.97 Kbytes Page：6 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET 文件：259.97 Kbytes Page：6 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET 文件：259.97 Kbytes Page：6 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：179.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：153.88 Kbytes Page：5 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：1.096 Mbytes Page：17 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：1.096 Mbytes Page：17 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：1.096 Mbytes Page：17 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：179.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：1.096 Mbytes Page：17 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：1.096 Mbytes Page：17 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：179.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：153.88 Kbytes Page：5 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-AND GATES 文件：179.08 Kbytes Page：7 Pages | TI 德州仪器 | |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Triple 3-Input AND Gate | Fairchild 仙童半导体 | Fairchild | | |
TRIPLE 3-INPUT AND GATE | ETC1 | ETC1 | | |
TRIPLE 3-INPUT AND GATE | ETC1 | ETC1 | | |
TRIPLE 3-INPUT AND GATE | ETC1 | ETC1 | | |
Triple 3-Input AND Gates | NSC 国半 | NSC | | |
Triple 3-Input AND Gate | Fairchild 仙童半导体 | Fairchild | | |
Triple 3-input Positive AND Gates(with Open Collector Outputs) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Triple 3-input Positive AND Gates (with Open Collector Outputs) | RENESAS 瑞萨 | RENESAS | | |
Ouadruple 2-input Positive NAND Gates | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Triple 3-input Positive AND Gates (with Open Collector Outputs) | RENESAS 瑞萨 | RENESAS | |
SN74LS11产品属性
- 类型
描述
- 型号
SN74LS11
- 功能描述
触发器 Dual Neg-Edge-Trig J-K Flip-Flop
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
24+ |
NA/ |
3519 |
原厂直销,现货供应,账期支持! |
|||
TI/德州仪器 |
25+ |
DIP |
12360 |
TI/德州仪器原装特价SN74LS11N即刻询购立享优惠#长期有货 |
|||
TI |
24+/25+ |
119 |
原装正品现货库存价优 |
||||
TI/德州仪器 |
23+ |
DIP |
50000 |
原装正品 支持实单 |
|||
TI |
93+ |
SOP14 |
2255 |
全新原装进口自己库存优势 |
|||
TI |
24+ |
DIP |
30000 |
原装正品公司现货,假一赔十! |
|||
TI |
25+ |
高频管 |
18000 |
原厂直接发货进口原装 |
|||
TI/德州仪器 |
2021+ |
SOIC-14 |
25000 |
只做原装，可提供样品 |
|||
TI |
2526+ |
原厂封装 |
12500 |
15年芯片行业经验/只供原装正品:0755-83267371邹小姐 |
|||
MOT |
25+ |
12 |
全新原装!优势库存热卖中! |
SN74LS11规格书下载地址
SN74LS11参数引脚图相关
- t4242
- t40
- t2222
- t2010
- t100k
- sw-262
- stm32f103
- stm32
- stk
- stc89c52rc
- stc12c5a60s2
- st70
- st18
- sst25vf040
- sr2m
- spwm
- spice模型
- spd
- sp3232
- soc
- SN74S38
- SN74S37
- SN74S32
- SN74S30
- SN74S22
- SN74S20
- SN74S15
- SN74S11
- SN74S10
- SN74S09
- SN74S08
- SN74S05
- SN74S04
- SN74S03
- SN74S02
- SN74S00
- SN74S
- SN74LVT
- SN74LVC
- SN74LV
- SN74LS11J
- SN74LS114ANS
- SN74LS114ANDS
- SN74LS114AND
- SN74LS114AN
- SN74LS114AJS
- SN74LS114AJDS
- SN74LS114AJD
- SN74LS114AJ
- SN74LS114A
- SN74LS112N
- SN74LS112ANS
- SN74LS112ANDS
- SN74LS112AND
- SN74LS112AN
- SN74LS112AJS
- SN74LS112AJDS
- SN74LS112AJD
- SN74LS112AJ
- SN74LS112A
- SN74LS10W
- SN74LS10NS
- SN74LS10NDS
- SN74LS10ND
- SN74LS10N
- SN74LS10JS
- SN74LS10JDS
- SN74LS10JD
- SN74LS10J
- SN74LS109N
- SN74LS109AW
- SN74LS109ANS
- SN74LS109ANDS
- SN74LS109AND
- SN74LS109AN
- SN74LS109AJS
- SN74LS109AJDS
- SN74LS109AJD
- SN74LS109AJ
- SN74LS109A
- SN74LS
- SN74L71
- SN74L44
- SN74L43
- SN74L42
- SN74HC
- SN74H87
- SN74H78
- SN74H74
- SN74H62
- SN74H61
- SN74H60
- SN74H00
- SN74F86
- SN74F74
- SN74F51
- SN74F38
- SN74F37
- SN74F36
- SN74F32
SN74LS11数据表相关新闻
SN74LS125ADR
SN74LS125ADR
2024-3-25SN74LS123DRG4
SN74LS123DRG4
2022-12-9SN74LS11DR
SN74LS11DR
2021-1-5SN74LS00N
SN74LS00N
2020-9-27SN74LS08N
SN74LS08N
2020-9-27SN74LS07DR具有集电极开路高电压输出的十六进制缓冲器/驱动器
原装正品，价格优势，竭力为您服务 0755-88600196/QQ3007281353
2019-6-24
DdatasheetPDF页码索引
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