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SN74LS11价格

参考价格:¥1.9428

型号:SN74LS112AD 品牌:TI 备注:这里有SN74LS11多少钱,2026年最近7天走势,今日出价,今日竞价,SN74LS11批发/采购报价,SN74LS11行情走势销售排行榜,SN74LS11报价。
型号 功能描述 生产厂家 企业 LOGO 操作
SN74LS11

3 通道、3 输入、4.75V 至 5.25V 双极与门

These devices contain three independent 3-input AND gates. The SN54LS11 and SN54S11 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS11 and SN74S11 are characterized for operation from 0°C to 70°C. • Package Options Include Plastic \"Small Outline\" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs\n• Dependable Texas Instruments Quality and Reliability;

TI

德州仪器

SN74LS11

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:179.08 Kbytes Page:7 Pages

TI

德州仪器

SN74LS11

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:153.88 Kbytes Page:5 Pages

TI

德州仪器

SN74LS11

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:1.096 Mbytes Page:17 Pages

TI

德州仪器

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to cha

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to cha

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to cha

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the

MOTOROLA

摩托罗拉

TRIPLE 3-INPUT AND GATE

TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY

MOTOROLA

摩托罗拉

TRIPLE 3-INPUT AND GATE

TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY

MOTOROLA

摩托罗拉

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR) 描述:IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路(IC) 触发器

TI

德州仪器

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR) 描述:IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路(IC) 触发器

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

74系列逻辑芯片

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

文件:1.32368 Mbytes Page:20 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR

文件:697.41 Kbytes Page:17 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET

文件:259.97 Kbytes Page:6 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET

文件:259.97 Kbytes Page:6 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET

文件:259.97 Kbytes Page:6 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:179.08 Kbytes Page:7 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:153.88 Kbytes Page:5 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:1.096 Mbytes Page:17 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:1.096 Mbytes Page:17 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:1.096 Mbytes Page:17 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:179.08 Kbytes Page:7 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:1.096 Mbytes Page:17 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:1.096 Mbytes Page:17 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:179.08 Kbytes Page:7 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:179.08 Kbytes Page:7 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件:153.88 Kbytes Page:5 Pages

TI

德州仪器

替换型号 功能描述 生产厂家 企业 LOGO 操作

Triple 3-Input AND Gate

FAIRCHILD

仙童半导体

TRIPLE 3-INPUT AND GATE

ETC1

TRIPLE 3-INPUT AND GATE

ETC1

TRIPLE 3-INPUT AND GATE

ETC1

Triple 3-Input AND Gates

NSC

国半

Triple 3-Input AND Gate

FAIRCHILD

仙童半导体

Triple 3-input Positive AND Gates(with Open Collector Outputs)

HITACHIHitachi Semiconductor

日立日立公司

Triple 3-input Positive AND Gates (with Open Collector Outputs)

RENESAS

瑞萨

Ouadruple 2-input Positive NAND Gates

HITACHIHitachi Semiconductor

日立日立公司

Triple 3-input Positive AND Gates (with Open Collector Outputs)

RENESAS

瑞萨

SN74LS11产品属性

  • 类型

    描述

  • Supply voltage (Min) (V):

    4.75

  • Supply voltage (Max) (V):

    5.25

  • Number of channels (#):

    3

  • Inputs per channel:

    3

  • IOL (Max) (mA):

    8

  • IOH (Max) (mA):

    -0.4

  • Input type:

    Bipolar

  • Output type:

    Push-Pull

  • Features:

    High speed (tpd 10- 50ns)

  • Data rate (Max) (Mbps):

    35

  • Rating:

    Catalog

  • Operating temperature range (C):

    0 to 70

更新时间:2026-5-23 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
25+
N/A
18798
正规渠道,免费送样。支持账期,BOM一站式配齐
TI
25+
-
7786
原装正品现货,原厂订货,可支持含税原型号开票。
TI
15+
BGA
2860
一级代理,专注军工、汽车、医疗、工业、新能源、电力
TI/德州仪器
2450+
DSBGA
9850
只做原厂原装正品现货或订货假一赔十!
TI/德州仪器
25+
DIP
12360
TI/德州仪器原装特价SN74LS11N即刻询购立享优惠#长期有货
TI/德州仪器
25+
SO-14
4987
强势库存!绝对原装公司现货!
Texas Instruments
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
MOT
25+
12
全新原装!优势库存热卖中!
TI/德州仪器
2402+
QFN
8324
原装正品!实单价优!
TI
22+
BGA
20000
公司只做原装 品质保障

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