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74LS11价格
参考价格：￥2.8327
型号：74LS11 品牌：Semiconductors 备注：这里有74LS11多少钱，2026年最近7天走势，今日出价，今日竞价，74LS11批发/采购报价，74LS11行情走势销售排行榜，74LS11报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74LS11 | Triple 3-Input AND Gate General Description This device contains three independent gates each of which performs the logic AND function. Features ■ Alternate military/aerospace device (54LS11) is available. Contact a National Semiconductor Sales Office/Distributor for specifications. | FAIRCHILD 仙童半导体 |   | |
74LS11 | TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE | ETCList of Unclassifed Manufacturers 未分类制造商 | | |
74LS11 | Triple 3-Input AND Gate General Description This device contains three independent gates each of which performs the logic AND function. | SYC | | |
74LS11 | Triple 3-Input AND Gate 7411, 74LS11, DM74LS11 Datasheet.\n\nThis device contains three independent gates each of which performs the logic AND function. | ONSEMI 安森美半导体 | | |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra | FAIRCHILD 仙童半导体 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the | MOTOROLA 摩托罗拉 | | ||
Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear) ● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....) | HITACHIHitachi Semiconductor 日立日立公司 | | ||
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra | FAIRCHILD 仙童半导体 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE | ETCList of Unclassifed Manufacturers 未分类制造商 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE | ETCList of Unclassifed Manufacturers 未分类制造商 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE | ETCList of Unclassifed Manufacturers 未分类制造商 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs | ONSEMI 安森美半导体 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 文件：147.21 Kbytes Page：4 Pages | MOTOROLA 摩托罗拉 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 文件：149.37 Kbytes Page：4 Pages | MOTOROLA 摩托罗拉 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY | MOTOROLA 摩托罗拉 | | ||
TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY | MOTOROLA 摩托罗拉 | | ||
Triple 3-Input AND Gates 文件：120.78 Kbytes Page：6 Pages | NSC 国半 | | ||
Triple 3-Input AND Gates 文件：120.78 Kbytes Page：6 Pages | NSC 国半 | | ||
Triple 3-Input AND Gates 文件：120.78 Kbytes Page：6 Pages | NSC 国半 | |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Triple 3-Input AND Gates | NSC 国半 | NSC | | |
Triple 3-Input AND Gate | FAIRCHILD 仙童半导体 | FAIRCHILD | | |
Triple 3-input Positive AND Gates(with Open Collector Outputs) | HITACHIHitachi Semiconductor 日立日立公司 | HITACHI | | |
Ouadruple 2-input Positive NAND Gates | HITACHIHitachi Semiconductor 日立日立公司 | HITACHI | | |
Triple 3-input Positive AND Gates (with Open Collector Outputs) | RENESAS 瑞萨 | RENESAS | | |
Triple 3-input Positive AND Gates (with Open Collector Outputs) | RENESAS 瑞萨 | RENESAS | | |
TRIPLE 3-INPUT POSITIVE-AND GATES | TI 德州仪器 | TI | | |
TRIPLE 3-INPUT POSITIVE-AND GATES | TI 德州仪器 | TI | | |
TRIPLE 3-INPUT POSITIVE-AND GATES | TI 德州仪器 | TI | | |
TRIPLE 3-INPUT AND GATE | MOTOROLA 摩托罗拉 | MOTOROLA | | |
TRIPLE 3-INPUT POSITIVE-AND GATES | TI 德州仪器 | TI | | |
TRIPLE 3-INPUT POSITIVE-AND GATES | TI 德州仪器 | TI | |
74LS11产品属性
- 类型
描述
- 型号
74LS11
- 制造商
Motorola
- 功能描述
74LS110 MOT S7G6B NOTES
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
FSC |
23+ |
SO3.9mm |
6800 |
只做原装正品假一赔十为客户做到零风险!! |
|||
TI/TEXAS |
26+ |
原厂封装 |
8931 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
TI |
25+23+ |
SOIC-16 |
10412 |
绝对原装正品全新进口深圳现货 |
|||
NS |
25+ |
SOP3。9 |
4500 |
原装正品!现货热卖! |
|||
HIT |
25+ |
DIP |
4500 |
全新原装、诚信经营、公司现货销售 |
|||
Signetics |
24+ |
DIP-16 |
125 |
||||
Renesas Electronics Corporatio |
24+25+ |
16500 |
全新原厂原装现货!受权代理!可送样可提供技术支持! |
||||
TI |
SOP |
650 |
正品原装--自家现货-实单可谈 |
||||
Signetics |
25+ |
84 |
公司优势库存 热卖中!! |
||||
TI |
22+ |
SOIC-16 |
1000 |
全新原装现货!自家库存! |
74LS11规格书下载地址
74LS11参数引脚图相关
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- 74LS10CH
- 74LS109W
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- 74LS109DC
- 74LS109CH
- 74LS109
- 74LS107W
- 74LS107J
- 74LS107DC
- 74LS107CH
- 74LS10
- 74LS09PC
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- 74LS08
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- 74LS05
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- 74LCX86
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2020-9-19
DdatasheetPDF页码索引
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