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SN54LS10价格
参考价格：￥39.2891
型号：SN54LS109AJ 品牌：Texas Instruments 备注：这里有SN54LS10多少钱，2025年最近7天走势，今日出价，今日竞价，SN54LS10批发/采购报价，SN54LS10行情走势销售排行榜，SN54LS10报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN54LS10 | TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE LOW POWER SCHOTTKY | Motorola 摩托罗拉 |   | |
SN54LS10 | TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：935.34 Kbytes Page：19 Pages | TI 德州仪器 | | |
SN54LS10 | TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：597.95 Kbytes Page：14 Pages | TI 德州仪器 | | |
SN54LS10 | TRIPLE 3-INPUT NAND GATE | ETC 知名厂家 | ETC | |
SN54LS10 | 军用 3 通道、3 输入、4.5V 至 5.5V 双极与非门 | TI 德州仪器 | | |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOWtransition of the clock. A LOW signal on CD input overrides the other inputs and makes th | Motorola 摩托罗拉 | | ||
DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’* Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The 107 contain two independent JK flip-flops with individual JK, clock, and direct clear inputs. The ‘107 is | TI 德州仪器 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOWtransition of the clock. A LOW signal on CD input overrides the other inputs and makes th | Motorola 摩托罗拉 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS109A consists of two high speed completely independent transition clocked JKflip-flops. The clocking operation is independent of rise andfall times of the clock waveform. The JKdesignallows operation as a D flip-flop by | Motorola 摩托罗拉 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS109A consists of two high speed completely independent transition clocked JKflip-flops. The clocking operation is independent of rise andfall times of the clock waveform. The JKdesignallows operation as a D flip-flop by | Motorola 摩托罗拉 | | ||
TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE LOW POWER SCHOTTKY | Motorola 摩托罗拉 | | ||
TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE LOW POWER SCHOTTKY | ONSEMI 安森美半导体 | | ||
DUAL J-K FLIP-FLOPS WITH CLEAR 文件：493.55 Kbytes Page：12 Pages | TI 德州仪器 | | ||
DUAL J-K FLIP-FLOPS WITH CLEAR 文件：841.36 Kbytes Page：16 Pages | TI 德州仪器 | | ||
DUAL J-K FLIP-FLOPS WITH CLEAR 文件：493.55 Kbytes Page：12 Pages | TI 德州仪器 | | ||
DUAL J-K FLIP-FLOPS WITH CLEAR 文件：493.55 Kbytes Page：12 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J.K POSITVE.EDGE.TRIGGERED FLIP.FLOPS WITH PRESET AND CLEAR 文件：579.2 Kbytes Page：12 Pages | TI 德州仪器 | | ||
具有预置和清零端的双路负边沿触发式 J-K 触发器 | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：597.95 Kbytes Page：14 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：935.34 Kbytes Page：19 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：597.95 Kbytes Page：14 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：935.34 Kbytes Page：19 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：597.95 Kbytes Page：14 Pages | TI 德州仪器 | | ||
Triple 3-Input NAND Gates 文件：120.85 Kbytes Page：6 Pages | NSC 国半 | | ||
Triple 3-Input NAND Gates 文件：120.85 Kbytes Page：6 Pages | NSC 国半 | | ||
Triple 3-Input NAND Gates 文件：120.85 Kbytes Page：6 Pages | NSC 国半 | | ||
Triple 3-Input NAND Gates 文件：120.85 Kbytes Page：6 Pages | NSC 国半 | | ||
Triple 3-Input NAND Gates 文件：120.85 Kbytes Page：6 Pages | NSC 国半 | |
SN54LS10产品属性
- 类型
描述
- 型号
SN54LS10
- 制造商
Texas Instruments
- 功能描述
Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin CDIP Tube
- 制造商
Rochester Electronics LLC
- 功能描述
- Bulk
- 制造商
Texas Instruments
- 功能描述
FLIP FLOP JK# -TYPE POS-EDGE 2-ELEM 16CDIP - Rail/Tube
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
DIP16 |
907 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI(德州仪器) |
24+ |
DIP16 |
1476 |
原装现货,免费供样,技术支持,原厂对接 |
|||
TI |
23+ |
NA |
20000 |
全新原装假一赔十 |
|||
TI |
24+ |
CDIP-16 |
8000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
|||
TI |
24+ |
N/A |
6000 |
只做原装正品现货 |
|||
TI |
23+ |
NA |
20000 |
||||
TI |
24+ |
CDIP |
19600 |
常备大量现货,原装正品 |
|||
TI |
23+ |
CDIP |
7500 |
绝对全新原装!优势供货渠道!特价!请放心订购! |
|||
TI/TEXAS |
NEW |
原厂封装 |
8931 |
代理全系列销售, 全新原装正品,价格优势,长期供应,量大可订 |
|||
HAARIS |
25+ |
CDIP |
30000 |
代理全新原装现货,价格优势 |
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SN54LS10规格书下载地址
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2020-11-16
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