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型号 功能描述 生产厂家 企业 LOGO 操作
NTE5596

SCRs

NTE

MOS IC

DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro

UTC

友顺

DDR TERMINATION REGULATOR

DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro

UTC

友顺

Street Fire HEI Module

文件:222 Kbytes Page:2 Pages

MALLORY

DDR TERMINATION REGULATOR

文件:219.14 Kbytes Page:12 Pages

UTC

友顺

DDR TERMINATION REGULATOR

文件:218.33 Kbytes Page:12 Pages

ETL

亚历电子

NTE5596产品属性

  • 类型

    描述

  • 型号

    NTE5596

  • 制造商

    NTE Electronics

  • 功能描述

    SCR THYRISTOR, 820A, 1.2KV TO-200AC; Peak Repetitive Off-State Voltage,

  • Vdrm

    1.2kV; Gate Trigger Current Max,

  • Igt

    300mA; Current It

  • av

    820A; On State RMS Current

  • IT(rms)

    1.64kA; Peak Non Rep Surge Current Itsm

  • 50Hz

    12.65kA ;RoHS

  • Compliant

    Yes

更新时间:2026-5-14 11:10:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
NTE
23+
39482
原厂授权一级代理,专业海外优势订货,价格优势、品种
26+
N/A
46000
一级代理-主营优势-实惠价格-不悔选择
2022+
1
全新原装 货期两周

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