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PN5596

Street Fire HEI Module

文件:222 Kbytes Page:2 Pages

MALLORY

MOS IC

DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro

UTC

友顺

DDR TERMINATION REGULATOR

DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro

UTC

友顺

DDR TERMINATION REGULATOR

文件:218.33 Kbytes Page:12 Pages

ETL

亚历电子

DDR TERMINATION REGULATOR

文件:219.14 Kbytes Page:12 Pages

UTC

友顺

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