P-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description SuperSOTTM-3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particular

-30V P 沟道逻辑电平增强型场效应晶体管

P-Channel 30 V (D-S) MOSFET

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WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS

DESCRIPTION These circuits are monolithic J-FET input operational amplifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors. This amplifiers feature low input bias and offset currents, low input offset voltage and input offset voltage drift,coup

WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS

DESCRIPTION These circuits are monolithic J-FET input operational amplifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors. This amplifiers feature low input bias and offset currents, low input offset voltage and input offset voltage drift,coup

WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS

DESCRIPTION These circuits are monolithic J-FET input operational amplifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors. This amplifiers feature low input bias and offset currents, low input offset voltage and input offset voltage drift,coup

SINGLE-PHASE SILICON BRIDGE RECTIFIER

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SINGLE-PHASE SILICON BRIDGE RECTIFIER (VOLTAGE RANGE 50 to 1000 Volts CURRENT 35 Amperes)

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