ISPLSI2032说明书PDF资料全球贸易商莱迪思-IC资料网

您好,欢迎来到114ic资料网！

114ic电子网登录注册

芯片资料

数据手册
丝印反查
库存查询
行业新闻
生产厂家
替换型号
晶体管

精确

位置：首页 > IC中文资料第1348页 > ISPLSI2032

ISPLSI2032价格

参考价格：￥22.0084

型号：ISPLSI2032A-110LJ44 品牌：LATTICE SEMICONDUCTOR 备注：这里有ISPLSI2032多少钱，2025年最近7天走势，今日出价，今日竞价，ISPLSI2032批发/采购报价，ISPLSI2032行情走势销售排行榜，ISPLSI2032报价。

型号	功能描述	生产厂家企业	LOGO
ISPLSI2032	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-110LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-110LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-110LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-110LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-110LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-110LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-135LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-135LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-135LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-135LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-135LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-135LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-150LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-150LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-150LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-150LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-150LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-150LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-180LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-180LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-180LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-180LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-180LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-180LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-80LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-80LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-80LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-80LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-80LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032-80LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-110LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-110LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-110LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-110LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-110LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-110LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-135LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-135LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-135LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-135LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-135LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-135LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-150LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-150LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-150LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-150LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-150LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-150LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-180LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-180LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-180LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-180LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-180LT48	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-180LT48I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-80LJ	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-80LJI	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-80LT44	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice
ISPLSI2032A-80LT44I	In-System Programmable High Density PLD Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete in	Lattice 莱迪思	Lattice

ISPLSI2032产品属性

类型
描述
型号
ISPLSI2032
功能描述
CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V
RoHS
否
制造商
Lattice
存储类型
EEPROM
大电池数量
128
最大工作频率
333 MHz
延迟时间
2.7 ns
可编程输入/输出端数量
64
工作电源电压
3.3 V
最大工作温度
+ 90 C
最小工作温度
0 C
封装/箱体
TQFP-100

ISPLSI2032供应商更多...

更新时间：2025-12-30 16:59:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳市星佑电子有限公司	ISPLSI2032A-80LJN44	LATTICE	12+	PLCC	6183	一定是全新原装正品只有原装LATTICE现货	询价
深圳市美思瑞电子科技有限公司	ISPLSI2032A-80LT44	LATTICE	22+	QFP	8645	原装正品，实单请联系	询价
深圳市拓亿芯电子有限公司	ISPLSI2032VE-225LT48	LAT	25+	LQFP48	15000	全新原装现货,假一赔十.	询价
瀚佳科技(深圳)有限公司	ISPLSI2032E-110LTN44	LATTICE	24+	QR	9800	一级代理/全新原装现货/长期供应!	询价
京海半导体(深圳)有限公司	ISPLSI2032VE-110LJ44	LATTICE/莱迪斯	23+	PLCC44	98900	原厂原装正品现货!!	询价
深圳市坤融电子科技有限公司	ISPLSI2032A-80LJN44	LATTICE/莱迪斯	2025+	PLCC	3000	原装进口价格优请找坤融电子!	询价
深圳市得捷芯城科技有限公司	ISPLSI2032-80LJI	Lattice(莱迪斯)	24+	N/A	9448	原厂可订货,技术支持,直接渠道。可签保供合同	询价
深圳市金华微盛电子有限公司	ISPLSI2032A-110LJ44	LATTICE	19+	PLCC44	9960		询价
深圳市科恒伟业电子有限公司	ISPLSI2032-80LJ	Lattice	23+	PLCC44	7850	只做原装正品假一赔十为客户做到零风险!!	询价
深圳市宏世佳电子科技有限公司	ISPLSI2032A-100LJ44	LATTICE	2025+	PLCC	4119	全新原装、公司现货热卖	询价

ISPLSI2032芯片相关品牌

ISPLSI2032规格书下载地址

ISPLSI2032参数引脚图相关

ISPLSI2032数据表相关新闻

ISPLSI1048C-50LG/883
CPLD - 复杂可编程逻辑器件
2019-12-18
ISPLSI1032E-70LJN，lattice专业户，现货支持
德信电子（香港）有限公司客服经理：林先生联系电话：0755-33359577
2019-7-22
ISPLSI2032A-80LJ44，lattice专业户，现货支持
德信电子（香港）有限公司客服经理：林先生联系电话：0755-33359577
2019-7-22
ISPLSI1032E-70LTN，lattice专业户，现货支持
德信电子（香港）有限公司客服经理：林先生联系电话：0755-33359577
2019-7-22
ISPLSI2032A-80LJN44，lattice专业户，现货支持
德信电子（香港）有限公司客服经理：林先生联系电话：0755-33359577
2019-7-22
ISPLSI2064A-100LT100公司大量原装正品现货/随时可以发货
瀚佳科技(深圳)有限公司专业工厂一站式BOM配单服务
2019-4-29

DdatasheetPDF页码索引

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
P57
P58
P59
P60
P61
P62
P63
P64
P65
P66
P67
P68
P69
P70
P71
P72
P73
P74
P75
P76
P77
P78
P79
P80
P81
P82
P83
P84
P85
P86
P87
P88
P89
P90
P91
P92
P93
P94
P95
P96
P97
P98
P99
P100
P101
P102
P103
P104
P105
P106
P107

您好,欢迎来到114ic资料网！

ISPLSI2032价格

ISPLSI2032产品属性

ISPLSI2032供应商更多...

ISPLSI2032芯片相关品牌

ISPLSI2032规格书下载地址

ISPLSI2032参数引脚图相关

ISPLSI2032数据表相关新闻

ISPLSI1048C-50LG/883

ISPLSI1032E-70LJN，lattice专业户，现货支持

ISPLSI2032A-80LJ44，lattice专业户，现货支持

ISPLSI1032E-70LTN，lattice专业户，现货支持

ISPLSI2032A-80LJN44，lattice专业户，现货支持

ISPLSI2064A-100LT100公司大量原装正品现货/随时可以发货

DdatasheetPDF页码索引