ISPLSI2032价格

参考价格:¥22.0084

型号:ISPLSI2032A-110LJ44 品牌:LATTICE SEMICONDUCTOR 备注:这里有ISPLSI2032多少钱,2025年最近7天走势,今日出价,今日竞价,ISPLSI2032批发/采购报价,ISPLSI2032行情走势销售排行榜,ISPLSI2032报价。
型号 功能描述 生产厂家&企业 LOGO 操作
ISPLSI2032

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor

莱迪思莱迪思半导体公司

Lattice

ISPLSI2032产品属性

  • 类型

    描述

  • 型号

    ISPLSI2032

  • 功能描述

    CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V

  • RoHS

  • 制造商

    Lattice

  • 存储类型

    EEPROM

  • 大电池数量

    128

  • 最大工作频率

    333 MHz

  • 延迟时间

    2.7 ns

  • 可编程输入/输出端数量

    64

  • 工作电源电压

    3.3 V

  • 最大工作温度

    + 90 C

  • 最小工作温度

    0 C

  • 封装/箱体

    TQFP-100

更新时间:2025-7-31 19:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Lattice
24+
QFP
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
LATTICE
2023+
TQFP44
53500
正品,原装现货
LATTICE/莱迪斯
21+
TQFP-48
9800
只做原装正品假一赔十!正规渠道订货!
LATTICE
97
PLCC 44PIN
185
一级代理,专注军工、汽车、医疗、工业、新能源、电力
LATTICE
24+/25+
1263
原装正品现货库存价优
LATTICE
23+
SOP8
41925
##公司主营品牌长期供应100%原装现货可含税提供技术
LATTICE
24+
QR
9800
一级代理/全新原装现货/长期供应!
LATTICE
20+
TQFP
2860
原厂原装正品价格优惠公司现货欢迎查询
LATTICE
24+
QFP
13500
免费送样原盒原包现货一手渠道联系
Lattice(莱迪斯)
24+
N/A
9448
原厂可订货,技术支持,直接渠道。可签保供合同

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