ISPLSI2032价格

参考价格:¥22.0084

型号:ISPLSI2032A-110LJ44 品牌:LATTICE SEMICONDUCTOR 备注:这里有ISPLSI2032多少钱,2024年最近7天走势,今日出价,今日竞价,ISPLSI2032批发/采购报价,ISPLSI2032行情走势销售排行榜,ISPLSI2032报价。
型号 功能描述 生产厂家&企业 LOGO 操作
ISPLSI2032

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-SystemProgrammableHighDensityPLD

Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

ISPLSI2032产品属性

  • 类型

    描述

  • 型号

    ISPLSI2032

  • 功能描述

    CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V

  • RoHS

  • 制造商

    Lattice

  • 存储类型

    EEPROM

  • 大电池数量

    128

  • 最大工作频率

    333 MHz

  • 延迟时间

    2.7 ns

  • 可编程输入/输出端数量

    64

  • 工作电源电压

    3.3 V

  • 最大工作温度

    + 90 C

  • 最小工作温度

    0 C

  • 封装/箱体

    TQFP-100

更新时间:2024-5-16 15:10:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE
23+
QFP44
1022
专业优势供应
13384
SMD
505
美国德州仪器TEXASINSTRUMENTS原厂代理辉华拓展内地现
LATTICE
19+
PLCC44
9960
Lattice
23+
PLCC44
7000
绝对全新原装!现货!特价!请放心订购!
LATTICE
23+
TQFP
4865
中国航天工业部战略合作伙伴行业领导者
LATTICE
2023+
TQFP44
53500
正品,原装现货
LATTICE
21+
6850
只做原装正品假一赔十!正规渠道订货!
LATTICE
22+
QFP
8645
原装正品,实单请联系
LATTICE
22+
NA
4520
绝对全新原装现货
LATTICE/莱迪斯
2021+
QFP
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货

ISPLSI2032芯片相关品牌

  • AVAGO
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  • HUBERSUHNER
  • IXYS
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  • Micron
  • MMD
  • NJSEMI
  • ROSENBERGER
  • Vicor
  • WALL

ISPLSI2032数据表相关新闻