位置:首页 > IC中文资料第8225页 > HM54
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
HM54 | High Current Toroidal Inductors 文件:1.15675 Mbytes Page:3 Pages | BITECH | ||
HM54 | High Current Toroidal Inductors 文件:779.69 Kbytes Page:3 Pages | TTELEC | ||
NPN EPITAXIAL PLANAR TRANSISTOR Description The HM5401 is designed for general purpose applications requiring high breakdown voltages. Features • High current-emitter breakdown voltage.VCEO=150V(@IC=1mA) • Complements to NPN type HM5551 | HSMC 华昕 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 횞 16-bit 횞 4-bank/8-Mword 횞 8-bit 횞 4-bank/ 16-Mword 횞 4-bit 횞 4-bank Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) | ELPIDA 尔必达 | |||
Inductive Cell Balancer IC with Balacing Curret Up to 2A 文件:7.40108 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
Inductive Cell Balancer IC with Balacing Curret Up to 2A 文件:7.40108 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
Inductive Cell Balancer IC with Balacing Curret Up to 2A 文件:7.40108 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
锂电充电平衡IC | HMSEMI 华之美半导体 | |||
1 Li-ion/Li-polymer battery charge balance IC 文件:642.98 Kbytes Page:8 Pages | HMSEMI 华之美半导体 | |||
1-Saving lithium iron phosphate battery charge balance IC 文件:959.53 Kbytes Page:10 Pages | HMSEMI 华之美半导体 | |||
1-Saving lithium iron phosphate battery charge balance IC 文件:959.53 Kbytes Page:10 Pages | HMSEMI 华之美半导体 | |||
1-Saving lithium iron phosphate battery charge balance IC 文件:959.53 Kbytes Page:10 Pages | HMSEMI 华之美半导体 | |||
Built-in MOSFET lithium battery protection chip 文件:645.89 Kbytes Page:8 Pages | HMSEMI 华之美半导体 | |||
二合一锂电保护IC | HMSEMI 华之美半导体 | |||
二合一锂电保护IC | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:671.19 Kbytes Page:6 Pages | HMSEMI 华之美半导体 | |||
Two-in-one lithium battery protection IC 文件:495.67 Kbytes Page:6 Pages | HMSEMI 华之美半导体 | |||
Single-cell Li-ion/Li-polymer rechargeable battery pack protection chip 文件:1.10702 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
Built-in MOSFET lithium battery protection chip 文件:655.01 Kbytes Page:8 Pages | HMSEMI 华之美半导体 | |||
1 Li-ion/Li-polymer battery protection IC 文件:1.11857 Mbytes Page:12 Pages | HMSEMI 华之美半导体 | |||
1 lithium-ion rechargeable battery pack 文件:625.78 Kbytes Page:13 Pages | HMSEMI 华之美半导体 | |||
1-cell lithium polymer rechargeable battery pack 文件:722.59 Kbytes Page:13 Pages | HMSEMI 华之美半导体 | |||
1 Li-ion/Li-polymer battery protection IC 文件:1.06608 Mbytes Page:14 Pages | HMSEMI 华之美半导体 | |||
1 lithium iron phosphate battery protection IC 文件:1.03323 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
1 Li-ion/Li-polymer battery protection IC 文件:2.37214 Mbytes Page:22 Pages | HMSEMI 华之美半导体 | |||
1 Li-ion/Li-polymer battery protection IC 文件:2.19647 Mbytes Page:26 Pages | HMSEMI 华之美半导体 | |||
2 lithium ion/lithium polymer battery protection IC 文件:1.29227 Mbytes Page:15 Pages | HMSEMI 华之美半导体 | |||
built-in high-precision voltage detection circuit 文件:380.48 Kbytes Page:7 Pages | HMSEMI 华之美半导体 | |||
built-in high-precision voltage detection circuit 文件:380.48 Kbytes Page:7 Pages | HMSEMI 华之美半导体 | |||
built-in high-precision voltage detection circuit 文件:380.48 Kbytes Page:7 Pages | HMSEMI 华之美半导体 | |||
2 lithium iron phosphate battery protection IC 文件:1.24301 Mbytes Page:16 Pages | HMSEMI 华之美半导体 | |||
Dual-cell Li-ion/Li-polymer battery protection IC 文件:375.16 Kbytes Page:13 Pages | HMSEMI 华之美半导体 | |||
H User Manual V1.0 文件:622.31 Kbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
Built-in MOSFET lithium battery protection chip 文件:738.85 Kbytes Page:8 Pages | HMSEMI 华之美半导体 | |||
LiFePO4 battery 2-CELL Protector 文件:874.31 Kbytes Page:13 Pages | HMSEMI 华之美半导体 | |||
Built-in high-precision voltage detection circuit built-in MOSFET 文件:573.01 Kbytes Page:7 Pages | HMSEMI 华之美半导体 | |||
Built-in MOSFET lithium battery protection chip 文件:682.64 Kbytes Page:8 Pages | HMSEMI 华之美半导体 | |||
single-cell lithium-ion/lithium polymer rechargeable battery packs 文件:1.39062 Mbytes Page:10 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:2.2072 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
Lithium battery protection circuit 文件:766.25 Kbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
Built-in MOSFET lithium battery protection chip 文件:683.69 Kbytes Page:8 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:1.34716 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:3.06963 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
One Cell Li-ion and Li-poly Battery Protection IC 文件:1.07858 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:761.6 Kbytes Page:7 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:1.31097 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:2.89917 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
One Cell Lithium-ion/Polymer Battery Protection IC 文件:1.31638 Mbytes Page:11 Pages | HMSEMI 华之美半导体 | |||
High Current Toroidal Inductors 文件:1.15675 Mbytes Page:3 Pages | BITECH |
HM54产品属性
- 类型
描述
- 型号
HM54
- 制造商
BITECH
- 制造商全称
Bi technologies
- 功能描述
High Current Toroidal Inductors
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
HSMC |
22+ |
SOT-89 |
100000 |
代理渠道/只做原装/可含税 |
|||
华之美 |
24+ |
SOT23-5 |
880000 |
明嘉莱只做原装正品现货 |
|||
华昕 |
23+ |
SOT-89 |
50000 |
原装正品 支持实单 |
|||
HZM |
24+ |
SOT-25 |
326295 |
专业代理锂电保护IC优势产品 |
|||
SOT-89 |
23+ |
NA |
15659 |
振宏微专业只做正品,假一罚百! |
|||
HM54-60R86VLF |
25+ |
1232 |
1232 |
||||
HIT |
05+ |
原厂原装 |
4311 |
只做全新原装真实现货供应 |
|||
HUAXIN |
2025+ |
SOT-89 |
3685 |
全新原厂原装产品、公司现货销售 |
|||
24+ |
QFP |
20 |
|||||
ELPIDA |
2450+ |
TSOP66 |
6540 |
只做原厂原装正品现货或订货!终端工厂可以申请样品! |
HM54规格书下载地址
HM54参数引脚图相关
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- HM5431
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- HM5425801BTT-75A
- HM5425801BTT-10
- HM5425801B
- HM5425401BTT-75B
- HM5425401BTT-75A
- HM5425401BTT-10
- HM5425401B
- HM5425161BTT-75B
- HM5425161BTT-75A
- HM5425161BTT-10
- HM5425161B/801B/401B
- HM5425161B
- HM5424F
- HM5424
- HM5423
- HM5422
- HM5421
- HM5420
- HM5416
- HM5412
- HM5411
- HM5410H
- HM5410G
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- HM5407
- HM5406
- HM5403
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- HM53XXB
- HM53XX
- HM53R
- HM53E
- HM53A6J4444Z
- HM53A6J4444
- HM538254J-7
- HM538254BTT-8
- HM538254BTT-7
- HM538254BTT-10
- HM538254BJ-8
- HM538254BJ-7
- HM538254BJ-10
- HM538254B
- HM538253TT-8
- HM538253TT-7
- HM538253TT7
- HM538253TT-10
- HM538253RR-8
- HM538253RR-7
- HM538253RR-10
- HM538253J-8
- HM538253J-7
- HM538253J-10
- HM5350
- HM53461
- HM5344
- HM5338
- HM5336
- HM5333
- HM5330
- HM5328
- HM5327
- HM5325
- HM5321
- HM5318
- HM5315B
- HM5315A
- HM5315
- HM5312
HM54数据表相关新闻
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2019-11-1HMA121CR3-全间距微型扁平封装4针光耦合器
HMA121CR3-全间距微型扁平封装4针光耦合器 HMA124,HMA121系列和HMA2701系列由砷化镓红外发光二极管驱动在一个紧凑的4针微型扁平封装的硅光电晶体管。引线间距为2.54毫米。 HMAA2705由两个砷化镓红外发光二极管反向并联连接,驾驶一个单一的硅光电晶体管在一个紧凑的4针微型扁平封装。引线间距2.54毫米 应用 HMAA2705 •交流线路监控 •未知极性直流传感器 •电话线接收器 HMA121系列,HMA2701系列,HMA124
2012-11-7
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