位置：首页 > IC中文资料 > DM74F112PC
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 |   | ||
Dual J-K negative edge-triggered flip-flop DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level | Philips 飞利浦 | | ||
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | |
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD/仙童 |
24+ |
DIP-16 |
9600 |
原装现货,优势供应,支持实单! |
|||
ON Semiconductor |
24+ |
16-DIP(0.300 |
56300 |
||||
NS |
23+ |
DIP |
50000 |
全新原装正品现货,支持订货 |
|||
FAIRCHILD/仙童 |
25+ |
DIP-16 |
65428 |
百分百原装现货 实单必成 |
|||
FAI |
24+ |
DIP16 |
20000 |
全新原厂原装，进口正品现货，正规渠道可含税！！ |
|||
ON/安森美 |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
|||
NS/国半 |
DIP16 |
275000 |
一级代理原装正品,价格优势,长期供应! |
||||
NS |
05+ |
DIP |
6 |
全新原装 绝对有货 |
|||
FSC/ON |
23+ |
原包装原封 □□ |
16211 |
原装进口特价供应 特价，原装元器件供应，支持开发样品 更多详细咨询 库存 |
|||
原厂 |
25+ |
4000 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
DM74F112PC规格书下载地址
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2012-11-9
DdatasheetPDF页码索引
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