位置：首页 > IC中文资料第350页 > 74F112
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74F112 | Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 |   | |
74F112 | Dual J-K negative edge-triggered flip-flop DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level | Philips 飞利浦 | | |
74F112 | Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | |
74F112 | Dual JK Negative Edge-Triggered Flip-Flop | ONSEMI 安森美半导体 | | |
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | |
74F112产品属性
- 类型
描述
- 型号
74F112
- 制造商
SNT
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NS |
8851 |
SOP |
990 |
原装现货 |
|||
ON/安森美 |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
|||
FAIRCHILD/仙童 |
24+ |
SOP3.9 |
128 |
大批量供应优势库存热卖 |
|||
FCS |
2023+ |
5.2MM |
1730 |
原厂全新正品旗舰店优势现货 |
|||
TI |
25+ |
3.9 |
2987 |
只售原装自家现货!诚信经营!欢迎来电! |
|||
FSC |
25+ |
SOP-16 |
9500 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
NS |
2023+ |
SOP-16 |
50000 |
原装现货 |
|||
Fairchild/ON |
22+ |
16SOIC |
9000 |
原厂渠道,现货配单 |
|||
NS |
05+ |
DIP |
6 |
全新原装 绝对有货 |
|||
NS |
18+ |
DIP |
85600 |
保证进口原装可开17%增值税发票 |
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74F112规格书下载地址
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74F112数据表相关新闻
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2019-3-4
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