位置：首页 > IC中文资料第7661页 > 74F112
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74F112 | Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 |   | |
74F112 | Dual J-K negative edge-triggered flip-flop DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level | Philips 飞利浦 | | |
74F112 | Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | |
74F112 | Dual JK Negative Edge-Triggered Flip-Flop | ONSEMI 安森美半导体 | | |
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | ||
Dual JK Negative Edge-Triggered Flip-Flop 文件：83.34 Kbytes Page：7 Pages | Fairchild 仙童半导体 | | ||
封装/外壳：16-SOIC（0.209"，5.30mm 宽） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 16SOP 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | |
74F112产品属性
- 类型
描述
- 型号
74F112
- 制造商
FAIRCHILD
- 制造商全称
Fairchild Semiconductor
- 功能描述
Dual JK Negative Edge-Triggered Flip-Flop
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NS |
8851 |
SOP |
990 |
原装现货 |
|||
FSC |
22+ |
SOIC/3.9mm/2 |
7500 |
全新原装现货!自家库存! |
|||
NS/国半 |
22+ |
SOP |
8000 |
原装正品支持实单 |
|||
FSC |
25+ |
SOP-16 |
9500 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
NS |
24+ |
SOP16 |
5000 |
全新原装正品,现货销售 |
|||
FAIRCHILD |
1999 |
SOP |
548 |
原装现货海量库存欢迎咨询 |
|||
NS |
24+ |
DIP16 |
25843 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
FAIRCHILD/仙童 |
2223+ |
SOP-16 |
26800 |
只做原装正品假一赔十为客户做到零风险 |
|||
24+ |
5000 |
公司存货 |
|||||
NS |
24+ |
SOP-16 |
3500 |
原装现货,可开13%税票 |
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