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CY7C1360价格

参考价格：￥118.1457

型号：CY7C1360A-150BGC 品牌：Cynergy 3 备注：这里有CY7C1360多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1360批发/采购报价，CY7C1360行情走势销售排行榜，CY7C1360报价。

型号	功能描述	生产厂家企业	LOGO
CY7C1360	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-150AC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-150AI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-150AJC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-150AJI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-150BGC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-150BGI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-166AC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-166AI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-166AJC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-166AJI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-166BGC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-166BGI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-200AC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-200AI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-200AJC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-200AJI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-200BGC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-200BGI	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-225AC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-225AJC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360A-225BGC	256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166AC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166AI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166AJC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166AJI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166BGC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166BGI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166BZC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-166BZI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200AC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200AI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200AJC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200AJI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200BGC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200BGI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200BZC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-200BZI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225AC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225AI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225AJC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225AJI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225BGC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225BGI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225BZC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360B-225BZI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166AJXC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166AJXI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166AXC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166AXI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BGC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BGI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BGXC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BGXI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BZC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BZI	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1360C-166BZXC	9-Mbit (256K x 36/512K x 18) Pipelined SRAM Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

CY7C1360产品属性

类型
描述
型号
CY7C1360
制造商
Cypress Semiconductor

CY7C1360供应商更多...

更新时间：2025-12-19 18:33:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
中天科工半导体（深圳）有限公司	CY7C1360C-166AXC	CYPRESS/赛普拉斯	25+	QFP	32360	CYPRESS/赛普拉斯全新特价CY7C1360C-166AXC即刻询购立享优惠#长期有货	询价
深圳市英卓尔科技有限公司	CY7C1360B-166AC	CY	20+	QFP	3242	英卓尔科技,进口原装现货!	询价
深圳市创新迹电子有限公司	CY7C1360C-166AXC	CY	2021+	TQFP	6800	原厂原装,欢迎咨询	询价
深圳市湘达电子科技有限公司	CY7C1360C-166AXC	CYPRESS/赛普拉斯	2022+	TQFP	379	只做进口原装正品现货,开13%增值税票!	询价
深圳市坤融电子科技有限公司	CY7C1360C-166AJXC	CYPRESS/赛普拉斯	2025+	TQFP100	750	原装进口价格优请找坤融电子!	询价
深圳市高捷芯城科技有限公司	CY7C1360C-166AJXCT	CYPRESS(赛普拉斯)	24+	LQFP-100	14093	正规渠道,大量现货,只等你来。	询价
深圳市宏世佳电子科技有限公司	CY7C1360B-166AC	CYPRESS	2025+	TQFP	3925	全新原装、公司现货热卖	询价
深圳市昊创电子有限公司	CY7C1360C-166AXI	CYPRESS	2021+	TQFP100	9450	原装现货。	询价
深圳市得捷芯城科技有限公司	CY7C1360S-166AXCT	CYPRESS(赛普拉斯)	24+	LQFP-100	5591	百分百原装正品,可原型号开票	询价
深圳市宏捷佳电子科技有限公司	CY7C1360C-200BGC	CYPREE	2023+	BGA	53500	正品,原装现货	询价

CY7C1360芯片相关品牌

CY7C1360规格书下载地址

CY7C1360参数引脚图相关

CY7C1360数据表相关新闻

CY7C1329H-133AXC
CY7C1329H-133AXC
2023-8-7
CY7C1399B-12ZC 十年IC，一家专业军工级IC供货商
CY7C1399B-12ZC CY7C1399B-12ZC，ALTERA（阿尔特拉），军工级IC专业优势渠道
2020-7-16
CY7C1399B-12ZC十年IC，一家专业军工级IC供货商
CY7C1399B-12ZC十年IC，一家专业军工级IC供货商
2020-7-15
CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯
CY7C1370D-167AXI产品资料
2020-6-28
CY7C1350G-133AXC公司原装现货/长期供应
全新原装
2019-3-30
CY7C1354C-166AXI公司原装现货/长期供应
全新原装
2019-3-30

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CY7C1360价格

CY7C1360产品属性

CY7C1360供应商更多...

CY7C1360芯片相关品牌

CY7C1360规格书下载地址

CY7C1360参数引脚图相关

CY7C1360数据表相关新闻

CY7C1329H-133AXC

CY7C1399B-12ZC 十年IC，一家专业军工级IC供货商

CY7C1399B-12ZC十年IC，一家专业军工级IC供货商

CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯

CY7C1350G-133AXC公司原装现货/长期供应

CY7C1354C-166AXI公司原装现货/长期供应

DdatasheetPDF页码索引