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CY7C1347价格

参考价格：￥34.6361

型号：CY7C1347G-133AXC 品牌：CYPRESS 备注：这里有CY7C1347多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1347批发/采购报价，CY7C1347行情走势销售排行榜，CY7C1347报价。

型号	功能描述	生产厂家企业	LOGO
CY7C1347B	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-100AC	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-100AI	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-100BGC	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-100BGI	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-133AC	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-133AI	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-133BGC	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-133BGI	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-166AC	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347B-166BGC	128K x 36 Synchronous-Pipelined Cache RAM Functional Description The CY7C1347B is a 3.3V, 128K by 36 synchronous-pipelined cache SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347D	128K x 36 Synchronous-Pipelined Cache SRAM Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347D-166AC	128K x 36 Synchronous-Pipelined Cache SRAM Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347D-200AC	128K x 36 Synchronous-Pipelined Cache SRAM Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347D-225BGC	128K x 36 Synchronous-Pipelined Cache SRAM Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347D-250AC	128K x 36 Synchronous-Pipelined Cache SRAM Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347D-250BGC	128K x 36 Synchronous-Pipelined Cache SRAM Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-133AC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-133AI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-133BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-133BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-133BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-166AC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-166AI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-166BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-166BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-166BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-200AC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-200AI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-200BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-200BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-200BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-225AC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-225BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-250AC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347F-250BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description[1] The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchro	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

CY7C1347产品属性

类型
描述
型号
CY7C1347
制造商
Rochester Electronics LLC
功能描述
- Bulk
制造商
Cypress Semiconductor

CY7C1347供应商更多...

更新时间：2025-10-20 11:58:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳市佳鑫美电子科技有限公司	CY7C1347G-133A	CYPRESS	25+	TQFP	2679	原装优势!绝对公司现货!可长期供货!	询价
贸泽芯城（深圳）电子科技有限公司	CY7C1347F-166BGI	CYPRESS/赛普拉斯	23+		10000	原厂授权一级代理,专业海外优势订货,价格优势、品种	询价
深圳市恒达亿科技有限公司	CY7C1347G-133ACX	CY	25+	QFP	4500	全新原装、诚信经营、公司现货销售!	询价
深圳市百诺芯科技有限公司	CY7C1347F-166BGC	CYPRESS/赛普拉斯	23+	NA	1218	原装正品代理渠道价格优势	询价
艾睿（深圳）半导体有限公司	CY7C1347G-133	CYPRESS/赛普拉斯	2447	QFP	100500	一级代理专营品牌!原装正品,优势现货,长期排单到货	询价
深圳市安富世纪电子有限公司	CY7C1347G-100AXC	Cypress Semiconductor Corp	23+	100-TQFP14x20	7300	专注配单,只做原装进口现货	询价
深圳市能元时代电子有限公司	CY7C1347F-200AC	CYPRESS	23+	14+	40999	公司原装现货!主营品牌!可含税欢迎查询	询价
深圳市毅创腾电子科技有限公司	CY7C1347F-166AXC	CYRESS?	23+	TQFP	5700	绝对全新原装!现货!特价!请放心订购!	询价
深圳诚思涵科技有限公司	CY7C1347G-133ACX	CYPRESS/赛普拉斯	24+	TSOP-32	9987	公司现货库存,支持实单	询价
深圳市一线半导体有限公司	CY7C1347G133AXC	CYPRESS	24+	QFP	220		询价

CY7C1347芯片相关品牌

CY7C1347规格书下载地址

CY7C1347参数引脚图相关

CY7C1347数据表相关新闻

CY7C1329H-133AXC
CY7C1329H-133AXC
2023-8-7
CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯
CY7C1370D-167AXI产品资料
2020-6-28
CY7C1350G-133AXC公司原装现货/长期供应
全新原装
2019-3-30
CY7C1354C-166AXI公司原装现货/长期供应
全新原装
2019-3-30
CY7C131-55JC公司原装现货/长期供应
瀚佳科技(深圳)有限公司专业为工厂一站式BOM配单服务
2019-3-29
CY7C1313BV18-167BZC公司原装现货/长期供应
瀚佳科技(深圳)有限公司专业为工厂一站式BOM配单服务
2019-3-29

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CY7C1347价格

CY7C1347产品属性

CY7C1347供应商更多...

CY7C1347芯片相关品牌

CY7C1347规格书下载地址

CY7C1347参数引脚图相关

CY7C1347数据表相关新闻

CY7C1329H-133AXC

CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯

CY7C1350G-133AXC公司原装现货/长期供应

CY7C1354C-166AXI公司原装现货/长期供应

CY7C131-55JC公司原装现货/长期供应

CY7C1313BV18-167BZC公司原装现货/长期供应

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