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CY7C1347G价格

参考价格：￥34.6361

型号：CY7C1347G-133AXC 品牌：CYPRESS 备注：这里有CY7C1347G多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1347G批发/采购报价，CY7C1347G行情走势销售排行榜，CY7C1347G报价。

型号	功能描述	生产厂家企业	LOGO
CY7C1347G	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G	4-Mbit (128 K x 36) Pipelined Sync SRAM Asynchronous output enable 文件：808.8 Kbytes Page：24 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BZXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BGXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166BZXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BGXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BGXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BZI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BZXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200BZXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250AXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250AXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BGC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BGI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BGXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BGXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BZC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BZI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BZXC	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-250BZXI	4-Mbit (128K x 36) Pipelined Sync SRAM Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G_11	4-Mbit (128 K x 36) Pipelined Sync SRAM Asynchronous output enable 文件：808.8 Kbytes Page：24 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G_12	4-Mbit (128 K 횞 36) Pipelined Sync SRAM 文件：538.13 Kbytes Page：25 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G_13	4-Mbit (128 K x 36) Pipelined Sync SRAM 文件：567.9 Kbytes Page：26 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXC	4-Mbit (128 K 횞 36) Pipelined Sync SRAM 文件：538.13 Kbytes Page：25 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXC	4-Mbit (128 K x 36) Pipelined Sync SRAM 文件：567.9 Kbytes Page：26 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXC	Memories for Embedded Systems - Synchronous SRAMs - Standard Sync -	Infineon 英飞凌	Infineon
CY7C1347G-133AXC	4-Mbit (128 K x 36) Pipelined Sync SRAM Asynchronous output enable 文件：808.8 Kbytes Page：24 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXCT	封装/外壳：100-LQFP 包装：卷带（TR）描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC）存储器	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133AXCT	Memories for Embedded Systems - Synchronous SRAMs - Standard Sync -	Infineon 英飞凌	Infineon
CY7C1347G-133AXI	Memories for Embedded Systems - Synchronous SRAMs - Standard Sync -	Infineon 英飞凌	Infineon
CY7C1347G-133BGXC	封装/外壳：119-BGA 包装：卷带（TR）描述：IC SRAM 4.5MBIT PARALLEL 119PBGA 集成电路（IC）存储器	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXC	4-Mbit (128 K x 36) Pipelined Sync SRAM Asynchronous output enable 文件：808.8 Kbytes Page：24 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXC	4-Mbit (128 K x 36) Pipelined Sync SRAM 文件：567.9 Kbytes Page：26 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-133BGXC	4-Mbit (128 K 횞 36) Pipelined Sync SRAM 文件：538.13 Kbytes Page：25 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXC	4-Mbit (128 K x 36) Pipelined Sync SRAM 文件：567.9 Kbytes Page：26 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXC	4-Mbit (128 K 횞 36) Pipelined Sync SRAM 文件：538.13 Kbytes Page：25 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-166AXC	4-Mbit (128 K x 36) Pipelined Sync SRAM Asynchronous output enable 文件：808.8 Kbytes Page：24 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1347G-200AXC	4-Mbit (128 K x 36) Pipelined Sync SRAM Asynchronous output enable 文件：808.8 Kbytes Page：24 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

CY7C1347G产品属性

类型
描述
型号
CY7C1347G
功能描述
IC SRAM 4.5MBIT 100MHZ 100LQFP
RoHS
是
类别
集成电路(IC) >> 存储器
系列
-
标准包装
1,000
系列
- 格式 -
存储器
RAM
存储器类型
移动 SDRAM
存储容量
256M（8Mx32）
速度
133MHz
接口
并联
电源电压
1.7 V ~ 1.95 V
工作温度
-40°C ~ 85°C
封装/外壳
90-VFBGA
供应商设备封装
90-VFBGA（8x13）
包装
带卷(TR)
其它名称
557-1327-2

CY7C1347G供应商更多...

更新时间：2025-10-20 20:07:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
中天科工半导体（深圳）有限公司	CY7C1347G-200AXC	CYPRESS/赛普拉斯	25+	QFP100	32360	CYPRESS/赛普拉斯全新特价CY7C1347G-200AXC即刻询购立享优惠#长期有货	询价
深圳市科芯源微电子有限公司	CY7C1347G-133AXC其他IC	CYPRESS/赛普拉斯	25+	QFP	58788	百分百原装现货实单必成欢迎询价	询价
深圳市明嘉莱科技有限公司	CY7C1347G-200AXC	CYPRESS/赛普拉斯	24+	QFP100	880000	明嘉莱只做原装正品现货	询价
深圳市威雅利发展有限公司	CY7C1347G-250AXC	CYPRESS	1443+	QFP	1391	一级代理,专注军工、汽车、医疗、工业、新能源、电力	询价
深圳市英卓尔科技有限公司	CY7C1347G133AXC	CYPRESS	20+	QFP	500	样品可出,优势库存欢迎实单	询价
深圳市和悦电子贸易有限公司	CY7C1347G-250AXC	CYPRESS		QFP100	50000		询价
深圳市科恒伟业电子有限公司	CY7C1347G-200BGC	CYPRESS	24+	BGA	8540	只做原装正品现货或订货假一赔十!	询价
深圳市凌旭科技有限公司	CY7C1347G-250AXC	CYPRESS	2016+	QFP	3000	本公司只做原装,假一罚十,可开17%增值税发票!	询价
深圳市正纳电子有限公司	CY7C1347G-133AXC	CY	ROHS+Original	NA	16	专业电子元器件供应链/QQ 350053121 /正纳电子	询价
深圳市宏捷佳电子科技有限公司	CY7C1347G-200AXC	CY	2023+	QFP	53500	正品,原装现货	询价

CY7C1347G芯片相关品牌

CY7C1347G规格书下载地址

CY7C1347G参数引脚图相关

CY7C1347G数据表相关新闻

CY7C1329H-133AXC
CY7C1329H-133AXC
2023-8-7
CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯
CY7C1370D-167AXI产品资料
2020-6-28
CY7C1350G-133AXC公司原装现货/长期供应
全新原装
2019-3-30
CY7C1354C-166AXI公司原装现货/长期供应
全新原装
2019-3-30
CY7C131-55JC公司原装现货/长期供应
瀚佳科技(深圳)有限公司专业为工厂一站式BOM配单服务
2019-3-29
CY7C1313BV18-167BZC公司原装现货/长期供应
瀚佳科技(深圳)有限公司专业为工厂一站式BOM配单服务
2019-3-29

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CY7C1347G价格

CY7C1347G产品属性

CY7C1347G供应商更多...

CY7C1347G芯片相关品牌

CY7C1347G规格书下载地址

CY7C1347G参数引脚图相关

CY7C1347G数据表相关新闻

CY7C1329H-133AXC

CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯

CY7C1350G-133AXC公司原装现货/长期供应

CY7C1354C-166AXI公司原装现货/长期供应

CY7C131-55JC公司原装现货/长期供应

CY7C1313BV18-167BZC公司原装现货/长期供应

DdatasheetPDF页码索引