Hex D-Type Flip-Flop 쨌 Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

CMOS COUNTER/DIVIDERS

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5阶Johnson译码计数器，5-stage Johnson Decade Counter

5阶Johnson译码计数器

Hex D-Type Flip-Flop · Quad D-Type Flip-Flop

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

Hex D-Type Flip-Flop 쨌 Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Hex D-Type Flip-Flop 쨌 Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Hex D-Type Flip-Flop 쨌 Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex ‘D’-Type Flip-Flop

Features • High Voltage Type (20V Rating) • 5V, 10V and 15V Parametric Ratings • Standardized, Symmetrical Output Characteristics • 100 Tested for Quiescent Current at 20V • Maximum Input Current of 1A at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC • Noise Margin (Over f

CMOS Hex ‘D’-Type Flip-Flop

Description CD40174BMS consists of six identical ‘D’-Type flip-flops having independent DATA inputs. The CLOCK andCLEAR inputs are common to all six units. Data is transferred to the Q outputs on the positive going transition of the clock pulse. All six flip-flops are simultaneously reset by a

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

Hex D-Type Flip-Flop 쨌 Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Hex D-Type Flip-Flop 쨌 Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad ‘D’ Type Flip-Flop

Description CD40175BMS consists of four identical D-type flip-flops. Each flip-flop has an independent DATA D input and complementary Q and Q outputs. The CLOCK and CLEAR inputs are common to all flip-flops. Data are transferred to the Q outputs on the positive going transition of the clock pulse

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Quad D - Type Flip-Flop

Features: 100% tested for quiescent current at20v Maximum input current of 1 uA at 18 V over full package- temperature range; 100.nA at 18V and 25°C | Noise margin (full package- temperature range) = 1VatVoo=5V 2VatVop=10V 25VatVoo=15V 5-V, 10-V, and 15-V parametric ratings Meets

CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical “1” on their r

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical “1” on their r

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical “1” on their r

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical “1” on their r

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

General Description The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. Features ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.

CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

COUNTERS/DIVIDERS

COUNTERS/DIVIDERS

COUNTERS/DIVIDERS

Decade Counter/Divider

5-stage Johnson counter

5-stage Johnson counter

5-stage Johnson decade counter

Decade Counter

COMPLEMENTARY METAL OXIDE SILICON

DECADE COUNTER/DIVIDER

Decade Counter/Divider

DECADE COUNTER/DIVIDER