丝印代码：CD4017BE；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

丝印代码：CD4017BE；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

丝印代码：CD4017BE；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC 10-OUT DECADE COUNTER 16-DIP 集成电路（IC） 计数器，除法器

CMOS COUNTER/DIVIDERS

文件：590.39 Kbytes Page：14 Pages

CMOS Counter/Dividers

文件：1.03167 Mbytes Page：19 Pages

CMOS Counter/Dividers

文件：1.03167 Mbytes Page：19 Pages

CMOS COUNTER/DIVIDERS

文件：590.39 Kbytes Page：14 Pages

封装/外壳：16-DIP（0.300"，7.62mm） 包装：管件 描述：IC 10-OUT DECADE COUNTER 16-DIP 集成电路（IC） 计数器，除法器

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

5-stage Johnson counter

DESCRIPTION The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Oo to O9), an active LOW output from the most significant flip-flop (O5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR). The

CMOS COUNTER/DIVIDERS

Hex D-Type Flip-Flop 路 Quad D-Type Flip-Flop

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

Decade Counter/Divider with 10 Decoded Outputs Divide-by-8 Counter/Divider with 8 Decoded Outputs

CMOS COUNTER/DIVIDERS

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

COUNTERS/DIVIDERS

COUNTERS/DIVIDERS

COUNTERS/DIVIDERS

Decade Counter/Divider

5-stage Johnson counter

5-stage Johnson counter

5-stage Johnson decade counter

Decade Counter

COMPLEMENTARY METAL OXIDE SILICON

DECADE COUNTER/DIVIDER

Decade Counter/Divider

DECADE COUNTER/DIVIDER