丝印代码：CD40174BM；CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

丝印代码：CD40174BM；CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

丝印代码：CD40174BM；CMOS Hex D - Type Flip-Flop

Features: 5.V, 10-V, and 15-V parametric rating Standsrdized symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 pA at 18 V . over full peckage-temperature range; 100 nA at 18 Vand 25°C Noise margin (over full package-temperature ran

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 6BIT 16SOIC 集成电路（IC） 触发器

Hex,Quad D Flip-Flop

文件：135.25 Kbytes Page：6 Pages

Hex D Flip-Flop

文件：135.26 Kbytes Page：6 Pages

CMOS HEX D-type Flip-Flop

文件：918.51 Kbytes Page：16 Pages

CMOS Hex ‘D’-Type Flip-Flop

Description CD40174BMS consists of six identical ‘D’-Type flip-flops having independent DATA inputs. The CLOCK andCLEAR inputs are common to all six units. Data is transferred to the Q outputs on the positive going transition of the clock pulse. All six flip-flops are simultaneously reset by a

CMOS Hex ‘D’-Type Flip-Flop

Features • High Voltage Type (20V Rating) • 5V, 10V and 15V Parametric Ratings • Standardized, Symmetrical Output Characteristics • 100 Tested for Quiescent Current at 20V • Maximum Input Current of 1A at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC • Noise Margin (Over f

CMOS Hex D-Type Flip-Flop

CD40174BMS consists of six identical 'D'-Type flip-flops having independent DATA inputs. The CLOCK and CLEAR inputs are common to all six units. Data is transferred to the Q outputs on the positive going transition of the clock pulse. All six flip-flops are simultaneously reset by a low level on the • High Voltage Type (20V Rating) \n• 5V, 10V and 15V Parametric Ratings \n• Standardized, Symmetrical Output Characteristics \n• 100% Tested for Quiescent Current at 20V \n• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC \n• Noise Margin (Over ful;

CMOS HEX D-type Flip-Flop

文件：918.51 Kbytes Page：16 Pages

Hex,Quad D Flip-Flop

文件：135.25 Kbytes Page：6 Pages

Hex,Quad D Flip-Flop

文件：135.25 Kbytes Page：6 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 6BIT 16SOIC 集成电路（IC） 触发器

Hex,Quad D Flip-Flop

文件：135.25 Kbytes Page：6 Pages

Hex,Quad D Flip-Flop

文件：135.25 Kbytes Page：6 Pages