CD4012B价格
参考价格:¥0.9534
型号:CD4012BE 品牌:TEXAS 备注:这里有CD4012B多少钱,2026年最近7天走势,今日出价,今日竞价,CD4012B批发/采购报价,CD4012B行情走势销售排行榜,CD4012B报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
丝印代码:CD4012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CD4012B | CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | ||
CD4012B | 2 通道、4 输入、3V 至 18V 与非门 CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Noise margin (over full package temperature range: 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 at VDD = 15 V\n• Meets all re; | TI 德州仪器 | ||
CD4012B | CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | ||
CD4012B | CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | ||
CD4012B | CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | ||
丝印代码:CD4012BE;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BE;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BE;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BF3A;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BF3A;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
军用 2 通道 4 输入 3V 至 18V 与非门 CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Noise margin (over full package temperature range: 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 at VDD = 15 V\n• Meets all re; | TI 德州仪器 | |||
CMOS NAND Gates Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standardized Symmetrical Output Characteristics • Maximum Input Current of 1A at 18V Over Full PackageTemperature Range; 100nA at 18V and +25oC • 100 Te | RENESAS 瑞萨 | |||
CMOS NAND Gates Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I | INTERSIL | |||
丝印代码:CM012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CM012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
封装/外壳:14-DIP(0.300",7.62mm) 包装:卷带(TR) 描述:IC GATE NAND 2CH 4-INP 14DIP 集成电路(IC) 门和反相器 | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:管件 描述:IC GATE NAND 2CH 4-INP 14SOIC 集成电路(IC) 门和反相器 | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CMOS NAND Gates | INTERSIL | INTERSIL | ||
Dual 4-Input NOR(NAND) Gate | NSC 国半 | NSC | ||
Dual 4-Input NOR(NAND) Gate | NSC 国半 | NSC | ||
CMOS NAND GATES | TI 德州仪器 | TI | ||
NAND GATES | STMICROELECTRONICS 意法半导体 | STMICROELECTRONICS | ||
NAND GATES | STMICROELECTRONICS 意法半导体 | STMICROELECTRONICS | ||
Dual 4-input NAND Gate | HITACHIHitachi Semiconductor 日立日立公司 | HITACHI | ||
Dual 4-input NAND gate | PHILIPS 飞利浦 | PHILIPS | ||
Dual 4-input NAND gate | PHILIPS 飞利浦 | PHILIPS | ||
B-Suffix Series CMOS Gates | MOTOROLA 摩托罗拉 | MOTOROLA | ||
B-Suffix Series CMOS Gates | MOTOROLA 摩托罗拉 | MOTOROLA | ||
B-Suffix Series CMOS Gates | ONSEMI 安森美半导体 | ONSEMI | ||
B−Suffix Series CMOS Gates | ONSEMI 安森美半导体 | ONSEMI | ||
COMPLEMENTARY METAL OXIDE SILICON | NTE | NTE | ||
INPUT NAND GATE | RANDE | RANDE | ||
C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC | TOSHIBA 东芝 | TOSHIBA |
CD4012B产品属性
- 类型
描述
- Supply voltage (Min) (V):
3
- Supply voltage (Max) (V):
18
- Number of channels (#):
2
- Inputs per channel:
4
- IOL (Max) (mA):
6.8
- IOH (Max) (mA):
-6.8
- Input type:
Standard CMOS
- Output type:
Push-Pull
- Features:
Standard speed (tpd > 50ns)
- Data rate (Max) (Mbps):
8
- Rating:
Catalog
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
22+ |
14SOIC |
9000 |
原厂渠道,现货配单 |
|||
TI |
23+ |
NA |
20000 |
||||
TI |
23+ |
14-SOP |
65600 |
||||
TI/德州仪器 |
24+ |
SOP-14 |
9600 |
原装现货,优势供应,支持实单! |
|||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源! |
|||
TI |
23+ |
SOP16 |
5000 |
全新原装,支持实单,非诚勿扰 |
|||
TI |
23+ |
14-SOIC |
15000 |
TI现货商!原装正品! |
|||
TI |
23+ |
SOP16 |
3200 |
公司只做原装,可来电咨询 |
|||
Texas Instruments |
23+ |
7300 |
专注配单,只做原装进口现货 |
||||
TI |
16+ |
SOP |
10000 |
原装正品 |
CD4012B规格书下载地址
CD4012B参数引脚图相关
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- CD4014
- CD4013BF
- CD4013BE
- CD4013BD
- CD4013BCN
- CD4013BCJ
- CD4013B
- CD4013AF
- CD4013AE
- CD4013AD
- CD4013
- CD4012UBF
- CD4012UBE
- CD4012UBD
- CD4012MW
- CD4012MJ
- CD4012M
- CD4012CN
- CD4012CJ
- CD4012C
- CD4012BF
- CD4012BE
- CD4012BD
- CD4012AF
- CD4012AE
- CD4012AD
- CD4012A
- CD4012
- CD4011UBF
- CD4011UBE
- CD4011UBD
- CD4011MW
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- CD4011CN
- CD4011CJ
- CD4011BMW
- CD4011BMJ
- CD4011BF
- CD4011BE
- CD4011BD
- CD4011BCN
- CD4011BCJ
- CD4011B
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- CD4011A
- CD40117
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- CD4010B
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CD4012B数据表相关新闻
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2019-8-9
DdatasheetPDF页码索引
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