CD4012价格
参考价格:¥10.3635
型号:CD4012AE 品牌:Semiconductors 备注:这里有CD4012多少钱,2026年最近7天走势,今日出价,今日竞价,CD4012批发/采购报价,CD4012行情走势销售排行榜,CD4012报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CD4012 | CMOS NAND Gates Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I | INTERSIL | ||
CD4012 | 4路输入非门 4路输入非门,工作电压(Vcc)(v)3-15V,静态电流Iq(Typ)0.01uA | XBLW 芯伯乐 | ||
CD4012 | 2路4输入与非门 The CD4012 is a Dual 4-input Nand Gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.It operates over a recommended VDD power supply range of 3V to 15V referenced to GND (usually ground). Unused inputs must be connected to VDD, GND, or a • Wide supply voltage range from 3V to 15V\n• Fully static operation\n• 5V, 10V, and 15V parametric ratings\n• Standardized symmetrical output characteristics\n• Inputs and outputs are protected against electrostatic effects\n• Specified from -40℃ to +125℃\n• Packaging information: DIP14/SOP14/TSSOP; | I-COREWUXI i-CORE Electronics Co., Ltd 中微爱芯无锡中微爱芯电子有限公司 | ||
CD4012 | CMOS NAND Gates | RENESAS 瑞萨 | ||
CD4012 | Dual 4-Input NOR(NAND) Gate 文件:113.28 Kbytes Page:6 Pages | NSC 国半 | ||
CD4012 | Dual 4-Input NOR(NAND) Gate 文件:107.87 Kbytes Page:6 Pages | NSC 国半 | ||
CD4012 | CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | ||
丝印代码:CD4012BE;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BE;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BE;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BF3A;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BF3A;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012BM;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CD4012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CMOS NAND Gates Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range) | TI 德州仪器 | |||
CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CMOS NAND Gates Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I | INTERSIL | |||
CMOS NAND Gates Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standardized Symmetrical Output Characteristics • Maximum Input Current of 1A at 18V Over Full PackageTemperature Range; 100nA at 18V and +25oC • 100 Te | RENESAS 瑞萨 | |||
丝印代码:CM012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
丝印代码:CM012B;CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre | TI 德州仪器 | |||
CMOS NAND GATES 文件:371.28 Kbytes Page:7 Pages | TI 德州仪器 | |||
CMOS NAND Gates 文件:200.37 Kbytes Page:4 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
封装/外壳:14-DIP(0.300",7.62mm) 包装:卷带(TR) 描述:IC GATE NAND 2CH 4-INP 14DIP 集成电路(IC) 门和反相器 | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:管件 描述:IC GATE NAND 2CH 4-INP 14SOIC 集成电路(IC) 门和反相器 | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件:523.01 Kbytes Page:12 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.18484 Mbytes Page:19 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:525.82 Kbytes Page:13 Pages | TI 德州仪器 | |||
CMOS NAND GATES 文件:1.29026 Mbytes Page:20 Pages | TI 德州仪器 |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
NAND GATES | STMICROELECTRONICS 意法半导体 | STMICROELECTRONICS | ||
NAND GATES | STMICROELECTRONICS 意法半导体 | STMICROELECTRONICS | ||
Dual 4-input NAND Gate | HITACHIHitachi Semiconductor 日立日立公司 | HITACHI | ||
Dual 4-input NAND gate | PHILIPS 飞利浦 | PHILIPS | ||
Dual 4-input NAND gate | PHILIPS 飞利浦 | PHILIPS | ||
B-Suffix Series CMOS Gates | MOTOROLA 摩托罗拉 | MOTOROLA | ||
B-Suffix Series CMOS Gates | MOTOROLA 摩托罗拉 | MOTOROLA | ||
B-Suffix Series CMOS Gates | ONSEMI 安森美半导体 | ONSEMI | ||
B−Suffix Series CMOS Gates | ONSEMI 安森美半导体 | ONSEMI | ||
COMPLEMENTARY METAL OXIDE SILICON | NTE | NTE | ||
INPUT NAND GATE | RANDE | RANDE | ||
C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC | TOSHIBA 东芝 | TOSHIBA |
CD4012产品属性
- 类型
描述
- Function:
NAND gates
- Description:
Dual 4-input NAND gate
- VCC (V):
3.0 - 15.0
- Logic switching levels:
CMOS
- Tamb (°C):
-40~125
- Nr of pins:
14
- Package:
DIP14/SOP14/TSSOP14
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
25+ |
PDIP-14 |
7786 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
TI |
25+ |
CERDIP-14 |
21000 |
原装正品现货,原厂订货,可支持含税原型号开票。 |
|||
ST/意法 |
23+ |
DIP |
8215 |
原厂原装 |
|||
TI/德州仪器 |
25+ |
DIP-14 |
32000 |
TI/德州仪器全新特价CD4012BE即刻询购立享优惠#长期有货 |
|||
TI/德州仪器 |
19+ |
DIP-14 |
5200 |
只做原装真实库存13714450367 |
|||
TI |
24+ |
DIP |
8500 |
只做原装正品假一赔十为客户做到零风险!! |
|||
NS |
QQ咨询 |
SOP |
182 |
全新原装 研究所指定供货商 |
|||
RCA |
2015+ |
SOP |
19889 |
一级代理原装现货,特价热卖! |
|||
RCA |
24+ |
DIP |
66800 |
原厂授权一级代理,专注汽车、医疗、工业、新能源! |
|||
ST/意法 |
24+ |
DIP |
300 |
大批量供应优势库存热卖 |
CD4012规格书下载地址
CD4012参数引脚图相关
- d2002
- d126
- d1004
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- CD4017B
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- CD40174
- CD4017
- CD4016B
- CD40163
- CD40162
- CD40161
- CD40160
- CD4016
- CD4015B
- CD4015
- CD4014B
- CD4014
- CD4013BCN
- CD4013BCJ
- CD4013B
- CD4013AF
- CD4013AE
- CD4013AD
- CD4013
- CD4012UBF
- CD4012UBE
- CD4012UBD
- CD4012MW
- CD4012MJ
- CD4012M
- CD4012CN
- CD4012CJ
- CD4012C
- CD4012BF
- CD4012BE
- CD4012BD
- CD4012B
- CD4012AF
- CD4012AE
- CD4012AD
- CD4012A
- CD4011UBF
- CD4011UBE
- CD4011UBD
- CD4011MW
- CD4011MJ
- CD4011CN
- CD4011CJ
- CD4011BMW
- CD4011BMJ
- CD4011BF
- CD4011BE
- CD4011BD
- CD4011BCN
- CD4011BCJ
- CD4011B
- CD4011AF
- CD4011AE
- CD4011AD
- CD4011A
- CD40117
- CD40116
- CD40110
- CD4011
- CD4010M
- CD4010CN
- CD4010CJ
- CD4010C
- CD4010B
- CD40108
- CD40107
- CD40106
- CD40105
- CD4010
- CD4009M
- CD4009C
- CD4009
- CD4008
- CD4007M
- CD4007C
CD4012数据表相关新闻
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单功能门74LVC SMD / SMT 1门2输入1输出-32 mA和32 mA-40 C 4.5 ns 5.5 V 1.65 V逻辑门,2输出AND 5.5 V逻辑门,AND,MUX,NAND,NOR,OR,反相器,非反相器逻辑门,2个门2个输入逻辑门,1个输出与逻辑门,PDIP-14 TTL 4个门NAND逻辑门
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原厂很远 现货很近 坚持每一片芯片都来自原厂及授权渠道
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2019-8-9
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