CD4011B价格

参考价格:¥0.7600

型号:CD4011BE 品牌:TI 备注:这里有CD4011B多少钱,2025年最近7天走势,今日出价,今日竞价,CD4011B批发/采购报价,CD4011B行情走势销售排行榜,CD4011B报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CD4011B

QUAD 2-INPUT NAND BUFFERED B SERIES GATE

■ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B • in positive logic. ■ FEATURES * 5V-10V-15V Parametric Ratings * Quad 2-Input NAND Gate * Symmetrical Output Characteristics * Maximum Input Current of 1uA at 15V Over Full Package Te

UTC

友顺

CD4011B

CMOS High Voltage Logic

Features High Input Voltage up to 20V Symmetrical Output Characteristics Max input current 1μA at 18V over full Military Temperature Range Low Power TTL compatible Specified at 5V, 10V & 15V Direct drop-in replacement for obsolete components in long term programs.

SS

CD4011B

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CD4011B

4路,2输入,3V至18V与非门

SUNGINE

双竞

CD4011B

4000系列逻辑芯片

HGSEMI

华冠

CD4011B

4 通道、2 输入、3V 至 18V 与非门

TI

德州仪器

CD4011B

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CD4011B

CMOS High Voltage Logic

文件:519.97 Kbytes Page:4 Pages

SS

CD4011B

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CD4011B

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

CMOS High Voltage Logic

Features High Input Voltage up to 20V Symmetrical Output Characteristics Max input current 1μA at 18V over full Military Temperature Range Low Power TTL compatible Specified at 5V, 10V & 15V Direct drop-in replacement for obsolete components in long term programs.

SS

Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate

General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also

Fairchild

仙童半导体

Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate

General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also

Fairchild

仙童半导体

Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate

General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also

Fairchild

仙童半导体

Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate

General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also

Fairchild

仙童半导体

CMOS Quad 2-Input NAND Gate

Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of

Intersil

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

QUAD 2-INPUT NAND BUFFERED B SERIES GATE

■ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B • in positive logic. ■ FEATURES * 5V-10V-15V Parametric Ratings * Quad 2-Input NAND Gate * Symmetrical Output Characteristics * Maximum Input Current of 1uA at 15V Over Full Package Te

UTC

友顺

CMOS Quad 2-Input NAND Gate

Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of

Intersil

QUAD 2-INPUT NAND BUFFERED B SERIES GATE

■ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B • in positive logic. ■ FEATURES * 5V-10V-15V Parametric Ratings * Quad 2-Input NAND Gate * Symmetrical Output Characteristics * Maximum Input Current of 1uA at 15V Over Full Package Te

UTC

友顺

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND Gates

Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standardized Symmetrical Output Characteristics • Maximum Input Current of 1A at 18V Over Full PackageTemperature Range; 100nA at 18V and +25oC • 100 Te

RENESAS

瑞萨

CMOS NAND Gates

Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I

Intersil

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

TI

德州仪器

CMOS Quad 2-Input NAND Gate

Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of

Intersil

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

Quad 2-Input NOR(NAND) Buffered B Series Gate

文件:164.76 Kbytes Page:6 Pages

NSC

国半

Quad 2-Input NOR,NAND Buffered B Series Gate

文件:167.6 Kbytes Page:6 Pages

NSC

国半

Quad 2-Input NOR,NAND Buffered B Series Gate

文件:167.6 Kbytes Page:6 Pages

NSC

国半

封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:卷带(TR) 描述:IC GATE NAND 4CH 2-INP 14SOIC 集成电路(IC) 门和反相器

ONSEMI

安森美半导体

封装/外壳:14-DIP(0.300",7.62mm) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NAND 4CH 2-INP 14DIP 集成电路(IC) 门和反相器

ONSEMI

安森美半导体

Quad 2-Input NOR,NAND Buffered B Series Gate

文件:167.6 Kbytes Page:6 Pages

NSC

国半

SEMICONDUCTORS

文件:2.43533 Mbytes Page:31 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件:523.01 Kbytes Page:12 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CMOS NAND GATES

文件:525.82 Kbytes Page:13 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.18484 Mbytes Page:19 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

CMOS NAND GATES

文件:1.29026 Mbytes Page:20 Pages

TI

德州仪器

替换型号 功能描述 生产厂家 企业 LOGO 操作

Quad 2-input NAND gate

ROHM

罗姆

High Voltage CMOS Logic ICs

ROHM

罗姆

High Voltage CMOS Logic ICs

ROHM

罗姆

Quad 2-Input NOR(NAND) Buffered B Series Gate

NSC

国半

Quad 2-Input NOR,NAND Buffered B Series Gate

NSC

国半

CMOS NAND GATES

TI

德州仪器

NAND GATES

STMICROELECTRONICS

意法半导体

NAND GATES

STMICROELECTRONICS

意法半导体

Quadruple 2-input NAND Gate

HitachiHitachi Semiconductor

日立日立公司

Quadruple 2-input NAND gate

Philips

飞利浦

Quadruple 2-input NAND gate

Philips

飞利浦

B-Suffix Series CMOS Gates

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

ONSEMI

安森美半导体

B−Suffix Series CMOS Gates

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

Motorola

摩托罗拉

B-SUFFIX SERIES CMOS GATES

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

Motorola

摩托罗拉

B-Suffix Series CMOS Gates

Motorola

摩托罗拉

B-SUFFIX SERIES CMOS GATES

ONSEMI

安森美半导体

COMPLEMENTARY METAL OXIDE SILICON

NTE

INPUT NAND GATE

RANDE

Quad 2 Input NAND Gate

TOSHIBA

东芝

QUAD 2 INPUT NAND GATE

TOSHIBA

东芝

C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

TOSHIBA

东芝

CD4011B产品属性

  • 类型

    描述

  • 型号

    CD4011B

  • 制造商

    TI

  • 制造商全称

    Texas Instruments

  • 功能描述

    CMOS NAND GATES

更新时间:2025-12-24 20:29:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
德州仪器/TI
24+
2000
全新原装深圳仓库现货有单必成
TI(德州仪器)
24+
标准封装
7438
原厂直销,大量现货库存,交期快。价格优,支持账期
TI/德州仪器
25+
SOP
32000
TI/德州仪器全新特价CD4011BM96即刻询购立享优惠#长期有货
TI
24+
DIP
5000
TI一级代理商原装进口现货
XINBOLE(芯伯乐)
24+
5112
只做原装现货假一罚十!价格最低!只卖原装现货
TI
DIP
50000
XBLW芯伯乐
24+
SOP-14
50000
品牌代理,价格优势,技术支持!!可直接对标进口品牌!
TI
2024+
N/A
70000
柒号只做原装 现货价秒杀全网
FSC
25+
SOP
6500
十七年专营原装现货一手货源,样品免费送
TI/德州
23+
N/A
10000
只做原装,实单最低价支持

CD4011B数据表相关新闻