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8394价格

参考价格:¥150.9874

型号:8394 品牌:ebm-papst 备注:这里有8394多少钱,2026年最近7天走势,今日出价,今日竞价,8394批发/采购报价,8394行情走势销售排行榜,8394报价。
型号 功能描述 生产厂家 企业 LOGO 操作
8394

包装:散装 描述:KEY CODE 8394 电路保护 配件

LITTELFUSE

力特

8394

包装:散装 描述:FAN AXIAL 80X32MM 24VDC TERM 风扇,热管理 无刷直流风扇(BLDC)

ETC

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Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

GENERAL DESCRIPTION The ICS83940-01 is a low skew, 1-to-18 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be i

IDT

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance • Selectable LVCMOS_CLK or LVPECL clock inputs • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency: 250MHz • Ou

RENESAS

瑞萨

LOW SKEW, 1-TO-18 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

GENERAL DESCRIPTION\nThe ICS83940-02 is a low skew, 1-to-18 Fanout Buffer. The 83940-02 has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels. The single ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs • 18 LVCMOS/LVTTL outputs, 7Ω typical output impedance\n• LVCMOS_CLK supports the following input types:\n• CLK0, nCLK0 pair can accept the following differential\n• Maximum output frequency: 200MHz\n• Part-to-part skew: 850ps (maximum)\n• 0°C to 70°C ambient operating temperature\n• Industrial temp;

RENESAS

瑞萨

Low Skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

GENERAL DESCRIPTION\nThe ICS83940 is a low skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer. The ICS83940 has twoselectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL output • Eighteen LVCMOS/LVTTL outputs, 16Ω typical output\n• Selectable LVCMOS_CLK or LVPECL clock inputs\n• LVCMOS_CLK accepts the following input levels:\n• Maximum output frequency: 250MHz\n• Part to part skew: 750ps (maximum)\n• 0°C to 70°C ambient operating temperature\n• Lead-Free package fully RoHS;

RENESAS

瑞萨

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • 18 LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Part t

RENESAS

瑞萨

丝印代码:ICS83940D01L;Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance • Selectable LVCMOS_CLK or LVPECL clock inputs • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency: 250MHz • Ou

RENESAS

瑞萨

丝印代码:ICS83940D01L;Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

GENERAL DESCRIPTION The ICS83940-01 is a low skew, 1-to-18 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be i

IDT

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

GENERAL DESCRIPTION The ICS83940-01 is a low skew, 1-to-18 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be i

IDT

丝印代码:ICS83940D01L;Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance • Selectable LVCMOS_CLK or LVPECL clock inputs • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency: 250MHz • Ou

RENESAS

瑞萨

丝印代码:ICS83940DYIL;Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer

Features • Eighteen LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew

RENESAS

瑞萨

丝印代码:ICS83940DYIL;Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer

Features • Eighteen LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew

RENESAS

瑞萨

丝印代码:ICS83940DYLF;Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • 18 LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Part t

RENESAS

瑞萨

丝印代码:ICS83940DYLF;Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • 18 LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Part t

RENESAS

瑞萨

Low Skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout

General Description The 83940I-01 is a low skew, 1-to-18 LVPECL-to-LVCMOS/ LVTTL Fanout Buffer. The 83940I-01 has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL or SSTL input levels. The single-ended clock input accepts LVCMOS or LVTTL input levels. The 83940I-01 is chara

RENESAS

瑞萨

丝印代码:ICS3947AYIN;Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

RENESAS

瑞萨

丝印代码:ICS3947AYIN;Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

RENESAS

瑞萨

Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

RENESAS

瑞萨

Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

GENERAL DESCRIPTION The 83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The effective fanout can be increased from 9 to 18 by utilizing the ability of the outputs to

RENESAS

瑞萨

丝印代码:ICS3948AI01L;Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

RENESAS

瑞萨

丝印代码:ICS3948AI01L;Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

RENESAS

瑞萨

丝印代码:ICS948AI147L;Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

RENESAS

瑞萨

丝印代码:ICS948AI147L;Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

RENESAS

瑞萨

丝印代码:ICS83948AYIL;Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

RENESAS

瑞萨

丝印代码:ICS83948AYI;Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

RENESAS

瑞萨

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

RENESAS

瑞萨

Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

RENESAS

瑞萨

Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

RENESAS

瑞萨

IC CLK BUFFER 2:18 200MHZ 32TQFP

RENESAS

瑞萨

Maximum output frequency

文件:220.52 Kbytes Page:16 Pages

IDT

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件:237.59 Kbytes Page:19 Pages

IDT

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件:237.59 Kbytes Page:19 Pages

IDT

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件:237.59 Kbytes Page:19 Pages

IDT

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件:237.59 Kbytes Page:19 Pages

IDT

Low Skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout

文件:221.75 Kbytes Page:19 Pages

IDT

Maximum output frequency

文件:122.17 Kbytes Page:10 Pages

IDT

丝印代码:ICS947AI147L;Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

文件:205.2 Kbytes Page:12 Pages

IDT

丝印代码:ICS947AI147L;Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

文件:205.2 Kbytes Page:12 Pages

IDT

丝印代码:ICS3947AYIN;Low Skew, 1-to-9 LVCMOS Fanout Buffer

文件:106.46 Kbytes Page:10 Pages

IDT

丝印代码:ICS3947AYIN;Low Skew, 1-to-9 LVCMOS Fanout Buffer

文件:106.46 Kbytes Page:10 Pages

IDT

Low Skew, 1-to-9 LVCMOS Fanout Buffer

文件:106.46 Kbytes Page:10 Pages

IDT

Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

文件:205.2 Kbytes Page:12 Pages

IDT

丝印代码:ICS948AI147L;Low Skew, 1-to-1 Differential to-

文件:361.45 Kbytes Page:17 Pages

IDT

丝印代码:ICS948AI147L;Low Skew, 1-to-1 Differential to-

文件:361.45 Kbytes Page:17 Pages

IDT

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件:291.67 Kbytes Page:13 Pages

IDT

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件:291.67 Kbytes Page:13 Pages

IDT

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件:291.67 Kbytes Page:13 Pages

IDT

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件:291.67 Kbytes Page:13 Pages

IDT

Low Skew, 1-to-1 Differential to-

文件:361.45 Kbytes Page:17 Pages

IDT

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件:294.97 Kbytes Page:11 Pages

INTERSIL

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件:383.8 Kbytes Page:11 Pages

INTERSIL

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件:294.97 Kbytes Page:11 Pages

INTERSIL

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件:294.97 Kbytes Page:11 Pages

INTERSIL

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件:383.8 Kbytes Page:11 Pages

INTERSIL

8394产品属性

  • 类型

    描述

  • 电路数:

    1

  • 比率 - 输入:

    输出

  • 差分 - 输入:

    输出

  • 输入:

    HCSL,LVCMOS,LVDS,LVHSTL,LVPECL,LVTTL,SSTL

  • 输出:

    LVCMOS,LVTTL

  • 频率 - 最大值:

    200MHz

  • 电压 - 电源:

    2.375 V ~ 3.465 V

  • 工作温度:

    -40°C ~ 85°C

  • 安装类型:

    表面贴装

  • 封装/外壳:

    32-LQFP

  • 供应商器件封装:

    32-TQFP(7x7)

更新时间:2026-5-22 15:57:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
IDT
2018+
26976
代理原装现货/特价热卖!
ICS
2138+
QFP
8960
专营BGA,QFP原装现货,假一赔十
IDT
22+
32TQFP
9000
原厂渠道,现货配单
RENESAS/瑞萨
25+
32-TQFP
32360
RENESAS/瑞萨全新特价83948AYI-147LFT即刻询购立享优惠#长期有货
IDT
23+
NA
320
原装正品代理渠道价格优势
IDT
2023+
QFP
1016
十五年行业诚信经营,专注全新正品
IDT
24+
20+
29954
只做原装进口现货
IDT
24+
QFP
8540
只做原装正品现货或订货假一赔十!
Renesas(瑞萨)
25+
封装
500000
源自原厂成本,高价回收工厂呆滞
ICS
23+
QFP
6500
专注配单,只做原装进口现货

8394数据表相关新闻