包装：散装 描述：KEY CODE 8394 电路保护 配件

包装：散装 描述：FAN AXIAL 80X32MM 24VDC TERM 风扇，热管理 无刷直流风扇（BLDC）

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

GENERAL DESCRIPTION The ICS83940-01 is a low skew, 1-to-18 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be i

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance • Selectable LVCMOS_CLK or LVPECL clock inputs • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency: 250MHz • Ou

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • 18 LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Part t

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance • Selectable LVCMOS_CLK or LVPECL clock inputs • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency: 250MHz • Ou

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

GENERAL DESCRIPTION The ICS83940-01 is a low skew, 1-to-18 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be i

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

GENERAL DESCRIPTION The ICS83940-01 is a low skew, 1-to-18 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be i

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance • Selectable LVCMOS_CLK or LVPECL clock inputs • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency: 250MHz • Ou

Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer

Features • Eighteen LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew

Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer

Features • Eighteen LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • 18 LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Part t

Low Skew, 1-to-18 LVPECL-TO-LVCMOS / LVTTL Fanout Buffer

FEATURES • 18 LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Part t

Low Skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout

General Description The 83940I-01 is a low skew, 1-to-18 LVPECL-to-LVCMOS/ LVTTL Fanout Buffer. The 83940I-01 has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL or SSTL input levels. The single-ended clock input accepts LVCMOS or LVTTL input levels. The 83940I-01 is chara

Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

GENERAL DESCRIPTION The 83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The effective fanout can be increased from 9 to 18 by utilizing the ability of the outputs to

Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

Low Skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

Maximum output frequency

文件：220.52 Kbytes Page：16 Pages

Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件：237.59 Kbytes Page：19 Pages

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件：237.59 Kbytes Page：19 Pages

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件：237.59 Kbytes Page：19 Pages

Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer

文件：237.59 Kbytes Page：19 Pages

Low Skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout

文件：221.75 Kbytes Page：19 Pages

Maximum output frequency

文件：122.17 Kbytes Page：10 Pages

Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

文件：205.2 Kbytes Page：12 Pages

Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

文件：205.2 Kbytes Page：12 Pages

Low Skew, 1-to-9 LVCMOS Fanout Buffer

文件：106.46 Kbytes Page：10 Pages

Low Skew, 1-to-9 LVCMOS Fanout Buffer

文件：106.46 Kbytes Page：10 Pages

Low Skew, 1-to-9 LVCMOS Fanout Buffer

文件：106.46 Kbytes Page：10 Pages

Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

文件：205.2 Kbytes Page：12 Pages

Low Skew, 1-to-1 Differential to-

文件：361.45 Kbytes Page：17 Pages

Low Skew, 1-to-1 Differential to-

文件：361.45 Kbytes Page：17 Pages

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件：291.67 Kbytes Page：13 Pages

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件：291.67 Kbytes Page：13 Pages

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件：291.67 Kbytes Page：13 Pages

Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

文件：291.67 Kbytes Page：13 Pages

Low Skew, 1-to-1 Differential to-

文件：361.45 Kbytes Page：17 Pages

Low Power, High Output Current, Quad Op Amp, Dual-Channel ADSL/ADSL2 Line Driver

文件：66.81 Kbytes Page：2 Pages

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件：294.97 Kbytes Page：11 Pages

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件：383.8 Kbytes Page：11 Pages

Providing high-performance solutions for every link in the signal chain

文件：9.95425 Mbytes Page：44 Pages

Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches

文件：607.5 Kbytes Page：11 Pages