FEATURES

• 18 LVCMOS/LVTTL outputs

• Selectable LVCMOS_CLK or LVPECL clock inputs

• PCLK, nPCLK supports the following input types:

LVPECL, CML, SSTL

• LVCMOS_CLK accepts the following input levels:

LVCMOS or LVTTL

• Maximum output frequency: 250MHz

• Output skew: 150ps (maximum)

• Part to part skew: 750ps (maximum)

• Additive phase jitter, RMS: < 0.03ps (typical)

• Full 3.3V and 2.5V or mixed 3.3V core, 2.5V output

supply modes

• 0°C to 70°C ambient operating temperature

• Lead-Free package available