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74LV7价格
参考价格：￥0.6612
型号：74LV74D,112 品牌：Philips Semiconducto 备注：这里有74LV7多少钱，2025年最近7天走势，今日出价，今日竞价，74LV7批发/采购报价，74LV7行情走势销售排行榜，74LV7报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Quad 2-input OR gate with Schmitt trigger inputs 1. General description The 74LV7032A is a quad 2-input OR function with Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in | NEXPERIA 安世 |   | ||
Quad 2-input OR gate with Schmitt trigger inputs 1. General description The 74LV7032A is a quad 2-input OR function with Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in | NEXPERIA 安世 | | ||
Quad 2-input OR gate with Schmitt trigger inputs 1. General description The 74LV7032A-Q100 is a quad 2-input OR function with Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs are overvoltage tolerant. This feature allows the use of these devices as translato | NEXPERIA 安世 | | ||
Quad 2-input OR gate with Schmitt trigger inputs 1. General description The 74LV7032A-Q100 is a quad 2-input OR function with Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs are overvoltage tolerant. This feature allows the use of these devices as translato | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock trans | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Ty | Philips 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Ty | Philips 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock trans | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Ty | Philips 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Ty | Philips 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Ty | Philips 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock trans | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Ty | Philips 飞利浦 | | ||
Discrete and MOSFET components, analog & logic ICs 文件：11.62183 Mbytes Page：234 Pages | NEXPERIA 安世 | | ||
Quad 2-input OR gate with Schmitt trigger inputs | NEXPERIA 安世 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS 文件：444.43 Kbytes Page：16 Pages | TI 德州仪器 | | ||
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14SO 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14SO 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Dual D-type flip-flop with set and reset; positive-edge trigger 文件：1.05556 Mbytes Page：17 Pages | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 文件：1.05556 Mbytes Page：17 Pages | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 文件：1.05556 Mbytes Page：17 Pages | NEXPERIA 安世 | |
74LV7产品属性
- 类型
描述
- 型号
74LV7
- 制造商
TI
- 制造商全称
Texas Instruments
- 功能描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Nexperia(安世) |
24+ |
SSOP14 |
2317 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
PHI |
24+ |
NA/ |
4000 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
PHI |
NEW |
SSOP |
12300 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
NEXPERIA/安世 |
24+ |
原厂原封可拆样 |
65258 |
百分百原装现货,实单必成 |
|||
NEXPERIA/安世 |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
||||
NEXPERIA/安世 |
19+ |
1000 |
原装现货支持BOM配单服务 |
||||
恩XP |
23+ |
SMD |
7000 |
||||
PHI |
22+ |
SSOP |
20000 |
公司只有原装 品质保证 |
|||
PHI |
03+ |
SSOP |
992 |
原装现货 |
|||
NEXPERIA/安世 |
25+ |
SOT337-1 |
600000 |
NEXPERIA/安世全新特价74LV74DB即刻询购立享优惠#长期有排单订 |
74LV7规格书下载地址
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74LV7数据表相关新闻
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2019-3-474LS90-十进制计数器;十二分频计数器;4位二进制计数器
74LS90：十进制计数器;十二分频计数器;4位二进制计数器 SN54/74LS90，SN54/74LS92和SN54/74LS93高速4位波纹型计数器，分割成两部分。每个计数器都有一个鸿沟由两节和一个分五（LS90），除以六（LS92）或 除以个（LS93）部分是由高向低过渡触发时钟输入。每一节都可以单独使用，或绑在了一起（问到CP），形成BCD，双向五元，模12模16计数器。所有 计数器有一个2输入门控主复位（清除），和LS90还有一个2输入与门控主设定（预设9）。 特点： •低功耗。通常为45兆瓦
2012-11-9
DdatasheetPDF页码索引
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